1. 2000
  2. The lambda-Scheduler: a multiwavelength scheduling switch

    Lang, JP., Varvarigos, EA. & Blumenthal, DJ., 2000, Proceedings thirty-seventh annual Allerton conference on communication, control and computing. B Hajek & RS Sreenivas (eds.). Urbana: University of Illinois, p. 689-698 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  3. The scalable networking scheme for high-speed networks

    Yeh, CH. & Varvarigos, EA., 2000, ICC 2000 conference record: global convergence through communications. Piscataway: IEEE Society, p. 1335-1342 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  4. VLSI layout and packaging of butterfly networks

    Yeh, CH., Parhami, B., Varvarigos, EA. & Lee, H., 2000, SPAA 2000. New York: Association for Computing Machinery (ACM), p. 196-205 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  5. 2001
  6. A linear threshold gate implemantation in single electron technology

    Lageweg, C., Cotofana, SD. & Vassiliadis, S., 2001, Proceedings. A Jacobs (ed.). Los Alamitos: IEEE, p. 93-98 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  7. A low power 2D/3D graphics accelerator: The initial design

    Antochi, I., Juurlink, BHH. & Vassiliadis, S., 2001, S.l.: s.n. 18 p.

    Research output: Book/ReportReportProfessional

  8. A low-cost, power-efficient texture cache architecture

    Antochi, I., Juurlink, BHH. & Cilio, AGM., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 250-257 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. A mathematical game and its applications to the design of interconnection networks

    Yeh, CH. & Varvarigos, EA., 2001, Proceedings. Los Alamitos: IEEE, p. 21-30 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. A new latch-based threshold logic familiy

    Padure, MD., Cotofana, SD., Dan, C., Bodea, M. & Vassiliadis, S., 2001, CAS 2001: proceedings. Piscataway: IEEE Society, p. 531-534 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. A padding processor for MPEG-4

    Kuzmanov, G., Vassiliadis, S. & van Eijndhoven, JTJ., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 470-474 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. A turnstile based single electron memory element

    Lageweg, C., Cotofana, SD. & Vassiliadis, S., 2001, SAFE 2001: proceedings. Utrecht: STW Technology Foundation, p. 103-108 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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