1. 2001
  2. Achieving fanout capabilities in single electron encoded logic networks

    Lageweg, C., Cotofana, SD. & Vassiliadis, S., 2001, Proceedings. Vol. 2. Piscataway: IEEE Society, p. 1383-1386 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. Agent-based social simulation in markets

    Bertels, KLM. & Boman, M., 2001, In : Electronic Commerce Research. 1, 1-2, p. 149-158 10 p.

    Research output: Contribution to journalArticleScientific

  4. An 8-point IDCT computing resource implemented on a trimedia/CPU64 reconfigurable functional unit

    Sima, M., Cotofana, SD., van Eijndhoven, JTJ. & Vassiliadis, S., 2001, Proceedings. F Karelse (ed.). Utrecht: STW Technology Foundation, p. 211-218 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  5. An analysis of limited wavelength translation in regular all-optical WDM networks

    Sharma, A. & Varvarigos, EA., 2001, In : Journal of Lightwave Technology. 18, 12, p. 1606-1619 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  6. An analysis of oblivious and adaptive routing in optical networks with wavelength translation

    Lang, JP., Sharma, A. & Varvarigos, EA., 2001, In : IEEE - ACM Transactions on Networking. 9, 4, p. 503-517 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  7. An energy-aware architectural exploration tool for ARM-based SOCs

    Crisu, D., Cotofana, SD. & Vassiliadis, S., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 327-337 11 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  8. An energy-aware architectural exploration tool for ARM-based SOCs

    Crisu, D., Cotofana, SD. & Vassiliadis, S., 2001, S.l.: s.n. 24 p.

    Research output: Book/ReportReportProfessional

  9. An implementation of the MPEG-4 ACQ function

    Kuzmanov, G., Vassiliadis, S. & van Eijndhoven, JTJ., 2001, ProRICS 2001: proceedings. Utrecht: STW Technology Foundation, p. 466-469 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. An optimization framework for retargetable compilers

    Panainte, E., Athanasiu, I. & Cotofana, SD., 2001, CSCS-13: proceedings. I Dumitrache & C Buiu (eds.). Bucharest: Editura Politehnica, p. 427-432 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. Coarse reconfigurable multimedia unit extension

    Wong, JSSM., Cotofana, SD. & Vassiliadis, S., 2001, Proceedings. K Klöckner (ed.). Los Alamitos: IEEE, p. 235-242 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. Code positioning for VLIW architectures

    Cilio, AGM. & Corporaal, H., 2001, HPCN Europe 2001: proceedings. G Goos & ... [et Al] (eds.). Berlin: Springer, p. 332-343 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  13. Compiler-controlled dynamic instruction dispatch in pipelined processors

    Batten, D., D'Arcy, PG., Glossner, CJ., Jinturkar, S., Thilo, J., Vassiliadis, S. & Wires, K., 2001, Priority date 10 Jul 2001

    Research output: PatentOther research output

  14. Design alternatives for parallel saturating multioperand adders

    Balzola, PI., Schulte, MJ., Ruan, J., Glossner, CJ. & Hokenek, E., 2001, Proceedings 2001 IEEE International conference on Computer design: VLSI in computers & Processors. Piscataway: IEEE Society, p. 172-178 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  15. Designing domain-specific processors

    Arnold, M. & Corporaal, H., 2001, CODES 2001: proceedings. New York: Association for Computing Machinery (ACM), p. 61-66 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  16. Detecting unique faults in multi-port SRAMs

    Hamdioui, S., van de Goor, AJ., Eastwick, D. & Rodgers, M., 2001, Proceedings. DC Young (ed.). Los Alamitos: IEEE, p. 37-42 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  17. Digital to analog conversion performed in single electron technology

    Lageweg, C., Cotofana, SD. & Vassiliadis, S., 2001, IEEE-NANO 2001: proceedings. Piscataway: IEEE Society, p. 105-110 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  18. Editorship:

    Vassiliadis, S. & ... [et Al], ., 2001, Euro-Par 2001: proceedings. Berlin: Springer, p. -

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  19. Embedded processor design using transport triggered architectures

    Corporaal, H., 2001, Proceedings. RHJM Otten (ed.). S.l.: IEEE Society, p. 25-34 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  20. Facilitating automatic test pattern generators using test point insertion

    Geuzebroek, MJ., van de Goor Ph D, AJ. & van Linden, JT., 2001, Global Semiconductor Manufacturing Technology. Business Briefing, p. 149-152

    Research output: Chapter in Book/Report/Conference proceedingChapterScientific

  21. Hierarchical intelligent simulation

    Niculiu, T. & Cotofana, SD., 2001, ESM'2001: proceedings. San Diego: Society for Computer Simulation International, p. 243-246 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  22. Impact of spot defects on fault modeling and tests in dual-port memories

    Hamdioui, S., van de Goor, AJ., Eastwick, D. & Rodgers, M., 2001, ETW 2001: proceedings. S.l.: s.n., p. 19-21 3 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  23. Implementation and evaluation of the complex streamed instruction set

    Juurlink, BHH., Tcheressiz, D., Vassiliadis, S. & Wijshoff, H., 2001, PACT 2001: proceedings. AD Williams (ed.). Los Alamitos: IEEE, p. 73-82 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  24. Implementation of encryption algorithms on transport triggered architectures

    Hamalainen, P., Hannikainen, M., Hamalainen, T., Corporaal, H. & Saarinen, J., 2001, ISCAS 2001 The 2001 IEEE International symposium on circuits and systems. Piscataway, NJ, USA: IEEE Society, p. 726-730 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  25. Local distributed agent matchmaking

    Ogston, E. & Vassiliadis, S., 2001, Cooperative information systems. C Batini & ... [et Al] (eds.). Berlin: Springer, p. 67-79

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  26. Logic BIST technology evaluation: an industrial case study

    Feige, C. & Geuzebroek, MJ., 2001, ETW 2001: Informal Digest. S.l.: s.n., p. 333-340 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  27. Low-power techniques and 2D/3D graphics architectures

    Crisu, D., Antochi, I., Cotofana, SD., Juurlink, BHH. & Vassiliadis, S., 2001, S.l.: s.n. 125 p.

    Research output: Book/ReportReportProfessional

  28. MPEG macroblock parsing and Pel reconstruction on an FPGA-augmented TriMedia processor

    Sima, M., Cotofana, SD., Vassiliadis, S., van Eijndhoven, JTJ. & Vissers, K., 2001, 2001 IEEE International conference on Computer design: VLSI in computers & processors. Piscataway, NJ, USA: IEEE Society, p. 425-431 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  29. MPEG-4 and the new multimedia architectural challenges

    Vassiliadis, S., Kuzmanov, GK. & Wong, JSSM., 2001, 15th International conference on Systems for automation of engineering and research (SAER-2001). Sofia, Bulgaria: SAER Forum Group, p. 24-32 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  30. Matchmaking among minimal agents without a facilitator

    Ogston, E. & Vassiliadis, S., 2001, Proceedings. JP Müller (ed.). New York: Association for Computing Machinery (ACM), p. 608-615 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  31. Multi-hierarchical learning-based co-simulation

    Niculiu, T. & Cotofana, SD., 2001, Proceedings. MH Hamza (ed.). Annaheim: iASTED, p. 24-29 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  32. Multihierarchical intelligent simulation

    Niculiu, T., Aktouf, C. & Cotofana, SD., 2001, In : Polytechnical University of Bucharest. Scientific Bulletin. Series C: Electrical Engineering and Computer Science. 63, 4, p. 15-24 10 p.

    Research output: Contribution to journalArticleScientific

  33. Network processors: issues and prospectives

    Vassiliadis, S., Wong, JSSM. & Cotofana, SD., 2001, PDPTA'2001: proceedings. Vol. 4. S.l.: CSREA, p. 1827-1833 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  34. On chaos and neural networks: the backpropagation paradigm

    Bertels, KLM., Neuberg, L., Vassiliadis, S. & Pechanek, DG., 2001, In : Artificial Intelligence Review: an international science and engineering journal. 15, 3, p. 165-187 23 p.

    Research output: Contribution to journalArticleScientificpeer-review

  35. Performance evaluation for a quasi-synchronous packet radio network (QSPNET)

    Banerjee, A., Iltis, RA. & Varvarigos, EA., 2001, In : IEEE - ACM Transactions on Networking. 9, 5, p. 567-578 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  36. Performance of the complex streamed instruction set on image processing kernels

    Tcheressiz, D., Juurlink, BHH., Vassiliadis, S. & Wijshoff, H., 2001, Euro-Par 2001: proceedings. R Sakellariou & ... [et Al] (eds.). Berlin: Springer, p. 678-686 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  37. Performance relevant issues for parallel computation models

    Juurlink, BHH. & Rieping, I., 2001, PDPTA'2001: proceedings. Vol 4. S.l.: CSREA, p. 1841-1847 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  38. RACE: A software-based fault tolerance scheme for systematically transforming ordinary algorithms to robust algorithms

    Yeh, C-H., Parhami, B., Varvarigos, EA. & Varvarigou, TA., 2001, Proceedings 15th international parallel and distributed processing symposium. Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  39. Realistic fault models and test procedure for multi-port SRAMs

    Hamdioui, S., van de Goor, AJ., Eastwick, D. & Rodgers, M., 2001, Proceedings. Los Alamitos: IEEE, p. 65-72 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  40. Reservation-based session routing for broadband communication networks with strict QoS requirements

    Yeh, CH., Varvarigos, EA., Bertsekas, D. & Mouftah, H., 2001, ICOIN the 15th: proceedings. Los Alamitos: IEEE, p. 593-600 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  41. SAD implementation in FPGA hardware

    Wong, JSSM., Vassiliadis, S. & Cotofana, SD., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 738-742 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  42. Single electron encoded logic circuits

    Lageweg, C., Cotofana, SD. & Vassiliadis, S., 2001, SAFE 2001: proceedings. Utrecht: STW Technology Foundation, p. 96-102 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  43. Sparse matrix vector multiplication evaluation using the BBCS scheme

    Stathis, P., Cotofana, SD. & Vassiliadis, S., 2001, Proceedings. Vol. 1. Y Manolopoulos & S Evripidou (eds.). S.l.: s.n., p. 40-49 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  44. Testing multi-port memories: theory and practice

    Hamdioui, S., 2001, S.l.: s.n.. 219 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  45. The MOLEN þµ-coded processor

    Vassiliadis, S., Wong, JSSM. & Cotofana, SD., 2001, Field-progammable logic and applications. G Goos & ... [et Al] (eds.). Berlin: Springer, p. 275-285

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  46. Transposition mechanism for sparse matrices on vector processors

    Stathis, P., Vassiliadis, S. & Cotofana, SD., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 641-645 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  47. Variable length decoder implemented on a TriMedia/CPU64 reconfigurable functional unit

    Sima, M., Cotofana, SD., Vassiliadis, S. & van Eijndhoven, JTJ., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 605-610 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  48. 2002
  49. 7/3 and 7/2 Counters implemented in single electron technology

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 344-350 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  50. A 2D adressing mode for multimedia applications

    Kuzmanov, GK., Vassiliadis, S. & van Eijndhoven, JTJ., 2002, Embedded processor design challenges: Systems, Architectures, Modeling, and Simulation - SAMOS. Deprettere, EF., Teich, J. & Vassiliadis, S. (eds.). Berlin: Springer, p. 291-307 16 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  51. A CMOS flip-flop featuring embedded threshold logic functions

    Padure, MD., Cotofana, SD. & Vassiliadis, S., 2002, Proceedings ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 388-392 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  52. A Java-enabled DSP

    Glossner, CJ., Schulte, MJ. & Vassiliadis, S., 2002, Embedded processor design challenges: Systems, Architectures, Modeling, and Simulation - SAMOS. Deprettere, EF., Teich, J. & Vassiliadis, S. (eds.). Berlin: Springer, p. 307-327 19 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  53. A family of single electron static buffered Boolean logic

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 339-343 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  54. A flexible simulator for exploring hardware rasterizers

    Antochi, I., Juurlink, BHH. & Vassiliadis, S., 2002, Proceedings ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  55. A full adder implementation using SET based linear threshold gates

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2002, Proceedings 9th IEEE International conference on electronics, circuits and systems - ICECS 2002. Baric, A. & et al. (eds.). Piscataway, NJ, USA: IEEE Society, p. 665-669 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  56. A hardware/software co-simulation environment for graphics accelerator development in ARM-based SOCs

    Crisu, D., Cotofana, SD. & Vassiliadis, S., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 255-267 13 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  57. A low power 2D/3D graphics accelerator; A preliminary ISA

    Antochi, I., Juurlink, BHH. & Vassiliadis, S., 2002, Delft: Delft University of Technology. 40 p.

    Research output: Book/ReportReportProfessional

  58. A low-power threshold logic family

    Padure, MD., Cotofana, SD., Vassiliadis, S., Dan, C. & Bodea, M., 2002, ICECS 2002; 9th IEEE International Conference on Electronica, Circuits and Systems. Piscatawy, NJ. USA: IEEE Society, p. 657-660 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  59. A multithreaded processor architecture for SDR

    Glossner, CJ., Raja, T., Hokenek, E. & Moudgill, M., 2002, In : Proceedings of the Korean Institute of Communication Sciences. 19, 11, p. 70-85 16 p.

    Research output: Contribution to journalArticleScientificpeer-review

  60. A peer-to-peer agent auction

    Ogston, EFYL. & Vassiliadis, S., 2002, Proceedings of the first international joint conference on Autonomous agents and multiagent systems Part I. Castelfranchi, C. & Johnson, WL. (eds.). New York: Association for Computing Machinery (ACM), p. 151-159 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  61. A proposal of a tile-based open GL compliant rasterization engine

    Crisu, D., Cotofana, SD. & Vassiliadis, S., 2002, Delft: Delft University of Technology. 123 p.

    Research output: Book/ReportReportProfessional

  62. A reconfigurable functional unit for TriMedia/CPU64

    Sima, M., Cotofana, SD., Vassiliadis, S. & van Eijndhoven, JTJ., 2002, Embedded processor design challenges: Systems, Architectures, Modeling and Simulation - SAMOS. Deprettere, EF., Teich, J. & Vassiliads, S. (eds.). Berlin: Springer, p. 224-242 18 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  63. A sum of absolute differences implementation in FPGA hardware

    Wong, JSSM., Vassiliadis, S. & Cotofana, SD., 2002, EUROMICRO 2002; Proceedings of the 28th EUROMICRO Conference. Fernandez, M. (ed.). Piscataway, NJ. USA: IEEE Society, p. 183-188 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  64. ALU Augmentation for MPEG-4 repetitive padding

    Kuzmanov, GK. & Vassiliadis, S., 2002, MPCS'02 Proceedings of the 2002 Euromicro conference on Massively-Parallel Computing Systems. Fort Collins, Col. USA: National Technological University Press, p. -

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  65. Address and data scrambling: causes and impact on memory tests

    van de Goor, AJ. & Schanstra, I., 2002, International workshop on Electronic design, test, and applications. Renovell, M. & et al. (eds.). Piscataway, NJ, USA: IEEE Society, p. 128-137 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  66. Alternatives in FPGA-based SAD implementations

    Wong, JSSM., Stougie, B. & Cotofana, SD., 2002, 2002 IEEE international conference on field-programmable technology (FPT). Piscataway: IEEE Society, p. 449-452 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  67. An artificial stock market

    Neuberg, L. & Bertels, KLM., 2002, Applied Informatics International symposium on artifcial intelligence and applications: Proceedings of the IASTED International Conference. Hamza, MH. (ed.). Anaheim: ACTA Press, p. 308-314 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  68. An investigation on FPGA based SAD hardware implementations

    Wong, JSSM., Stougie, B. & Cotofana, SD., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 567-573 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  69. Approximating infinite dynamic behavior for DRAM cell defects

    Al-Ars, Z. & van de Goor, AJ., 2002, 20th VLSI Test symposium Proceedings. Piscataway, NJ, USA: IEEE Society, p. 401-407 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  70. Architectural support for 3D graphics in the complex streamed instruction set

    Cheresiz, D., Juurlink, BHH., Vassiliadis, S. & Wijshoff, HAG., 2002, Parallel and distributed computing and systems; Proceedings of the 14th IASTED International conference. Akl, SG. & Gonzalez, T. (eds.). Anaheim: ACTA Press, p. 536-542 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  71. Architectural support for 3D graphics in the complex streamed instruction set

    Cheresiz, D., Juurlink, BHH., Vassiliadis, S. & Wijshoff, HAG., 2002, In : International Journal of Parallel and Distributed Systems & Networks. 5, 4, p. 185-193 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  72. Automatic VHDL model generation of parameterized FIR filters

    Walters III, EG., Glossner, CJ. & Schulte, MJ., 2002, Second International Samos Workshop on Systems, Architectures, Modeling, and Simulation-Proceedings. Leiden: SAMOS Initiative, p. 1-14 14 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  73. Building blocks for MPEG stream processing

    Wong, JSSM., van Kester, J., Konstapel, M., Serra, R. & Visser, O., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 556-560 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  74. Clustering on the move

    Roos, S., Corporaal, H. & Lamberts, R., 2002, MPCS '02 Proceedings of the 2002 Euromicro conference on Massively-parallel computing systems. Fort Collins, Colorado, USA: The National Technological University Press, p. 1-9 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  75. Code generation and optimization for embedded processors

    Cilio, AGM., 2002, Genova, Italy: ECIG Edizioni Culturali Internazionali Genova. 174 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  76. Codeword detection for parallel variable length decoding

    Nikara, J., Vassiliadis, S., Takala, J. & Liuha, P., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  77. Compact delay modeling of latch-based threshold logic gates

    Padure, MD., Cotofana, SD., Dan, C., Vassiliadis, S. & Bodea, M., 2002, CAS 2002 Proceedings, Volume 2. Piscataway, NJ, USA: IEEE Society, p. 317-320 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  78. Component-based development in multi agent systems

    Bertels, KLM. & Boman, M., 2002, Net.object days; Offizielle Nachfolge-Veranstaltung der JavaDays, STJA, JIT, DJEK. Ilmenau, Germany: Organisatoren Net.ObjectDays, p. 185-194 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  79. DAMP - Delft Altera-based multimedia platform

    Zwart, W., Eilers, J., Gaydadjiev, GN. & Cotofana, SD., 2002, Proceedings ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 587-594 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  80. DCT and IDCT implementations on different FPGA technologies

    Bukhari, K., Kuzmanov, GK. & Vassiliadis, S., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 232-235 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  81. DPM Reduction on dual-port caches

    Hamdioui, S., van de Goor, AJ. & Rodgers, M., 2002, ETW'02: 7th IEEE European Test Workshop; Informal Digest. IEEE Society, p. 55-60 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  82. DRAM Specific approximation of the faulty behavior of cell defects

    Al-Ars, Z. & van de Goor, AJ., 2002, Proceedings of the 11th Asian test symposium (ATS'02). Piscataway, NJ, USA: IEEE Society, p. 98-104 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  83. Design considerations of a multiple inner product and accumulate vector functional unit

    Stathis, PT., Vassiliadis, S. & Cotofana, SD., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 481-485 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  84. Determining the criticality of processes in Kahn process networks for design space exploration

    Hofstee, D. & Juurlink, BHH., 2002, Proceedings ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 292-297 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  85. Developing a retargetable compiler: some preliminary results

    Panainte, E., Bertels, KLM. & Vassiliadis, S., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  86. Direct and transposed sparse matrix-vector multiplication

    Cotofana, SD., Stathis, PT. & Vassiliadis, S., 2002, MPCS '02 Proceedings of the 2002 Euromicro conference on Massively-parallel computing systems. Fort Collins, Colorado, USA: The National Technological University Press, p. 1-9 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  87. Efficient tests for realistic faults in dual-port SRAMS

    Hamdioui, S. & van de Goor, AJ., 2002, In : IEEE Transactions on Computers. 51, 5, p. 460-474 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  88. Entropy decoding on TriMedia/CPU64

    Sima, M., Pol, E-J., van Eijndhoven, JTJ., Cotofana, SD. & Vassiliadis, S., 2002, Proceedings Second international Samos workshop on Systems, Architectures, Modeling and Simulation. Leiden: SAMOS Initiative, p. 1-18 18 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  89. FSM Non-minimal state encoding for low power

    Lemberski, I., Koegst, M., Cotofana, SD. & Juurlink, BHH., 2002, Proceedings 2002 23rd International conference on microelectronics, Vol. 2. Piscataway, NJ, USA: IEEE Society, p. 605-609 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  90. Field-programmable custom computing machines - A taxonomy

    Sima, M., Vassiliadis, S., Cotofana, SD., van Eijndhoven, JTJ. & Vissers, K., 2002, Field-programmable logic and applications: Reconfigurable computing is going mainstream. Glesner, M., Zipf, P. & Renovell, M. (eds.). Berlin: Springer, p. 79-88 10 p. (Lecture Notes in Computer Science; vol. 2438).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  91. Future directions of (programmable and reconfigurable) embedded processors

    Wong, JSSM., Vassiliadis, S. & Cotofana, SD., 2002, SAMOS 2002 Proceedings of the Second International Samos Workshop on Systems, Architectures, Modeling, and Simulation. Leiden: SAMOS Initiative, p. -

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  92. Global variable promotion: using registers to reduce cache power dissipation

    Cilio, AGM. & Corporaal, H., 2002, Compiler construction: 11th International conference; proceedings / CC 2002. Horspool, RN. (ed.). Berlin: Springer, p. 247-261 15 p. (Lecture Notes in Computer Science; vol. 2304).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  93. Hierarchical intelligent mixed simulation

    Niculiu, T. & Cotofana, SD., 2002, Modelling and simulation 2002; 16th European simulation multiconference. Amborski, K. & Meuth, H. (eds.). Ghent: SCS Publishing House, p. 159-162 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  94. High-level intelligence-oriented simulation

    Niculiu, T., Aktouf, C. & Cotofana, SD., 2002, CAS 2002 proceedings, Volume 2. Piscataway, NJ, USA: IEEE Society, p. 381-385 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  95. High-speed hybrid threshold-Boolean logic

    Padure, MD., Cotofana, SD. & Vassiliadis, S., 2002, Proceedings ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 384-388 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  96. High-speed hybrid threshold-boolean logic counters and compressors

    Padure, MD., Cotofana, SD. & Vassiliadis, S., 2002, MWSCAS-2002; proceedings of the 2002 45th Midwest symposium on circuits and systems. s.n. (ed.). Piscataway: IEEE Society, p. 457-460 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  97. Implementation of a streaming execution unit

    Cheresiz, D., Juurlink, BHH., Vassiliadis, S. & Wijshoff, HAG., 2002, DSD 2002; EUROMICRO Symposium on Digital System Design, Architectures, Methods and Tools. Edwards, M. (ed.). Piscataway, NJ. USA: IEEE Society, p. 156-164 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  98. MPEG-compliant entropy decoding on FPGA-augmented TriMedia/CPU64

    Sima, M., Cotofana, SD., Vassiliadis, S., van Eijndhoven, JTJ. & Vissers, K., 2002, IEEE Symposium on field-programmable custom computing machines. Arnold, J. & Pocek, L. (eds.). Piscataway, NJ, USA: IEEE Society, p. 261-273 13 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  99. March SS: A test for all static simple RAM faults

    Hamdioui, S., van de Goor, AJ. & Rodgers, M., 2002, Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT 2002). Courtois, B., Wik, T. & Zorian, Y. (eds.). Piscataway, NJ, USA: IEEE Society, p. 95-100 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  100. Microarchitectural extension for lifting-based DWT

    Kuzmanov, GK., Zafarifar, B., Shrestha, P. & Vassiliadis, S., 2002, PROGRESS 2002: Networked embedded systems all over the place; Proceedings. Utrecht: Dutch Technology Foundation STW, p. 108-116 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  101. Microcoded reconfigurable embedded processors

    Wong, JSSM., 2002, Delft: S. Wong. 164 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  102. Microcoded reconfigurable embedded processors: current developments

    Wong, JSSM., Vassiliadis, S. & Cotofana, SD., 2002, Embedded processor design challenges: Systems, Architectures, Modeling, and Simulation - SAMOS. Deprettere, EF., Teich, J. & Vassiliadis, S. (eds.). Berlin: Springer, p. 207-224 17 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

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