1. 2002
  2. Minimal test for coupling faults in word-oriented memories

    van de Goor, AJ., Abadir, MS. & Carlin, JF., 2002, DATE 02; Design, automation and test in Europe. Delgado Kloos, C. & da Franca, J. (eds.). Piscataway, NJ, USA: IEEE, p. 944-948 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. Modeling techniques and tests for partial faults in memory devices

    Al-Ars, Z. & van de Goor, AJ., 2002, DATE'02: Design, automation and test in Europe; Proceedings. Delgado Kloos, C. & da Franca, J. (eds.). Piscataway, NJ, USA: IEEE Society, p. 89-94 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  4. Multi-threaded processor for software defined radio

    Glossner, CJ., Hokenek, E. & Moudgill, M., 2002, Proceedings of the 2002 Software defined radio technical conference SDR'02. s.l.: s.n., p. 195-199 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  5. Off-chip memory traffic measurements of low-power embedded systems

    de Langen, P. & Juurlink, BHH., 2002, Proceedings ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 351-358 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  6. On efficiency of transport triggered architectures in DSP applications

    Heikkinen, JM., Takala, J., Cilio, AGM. & Corporaal, H., 2002, Advances in systems engineering, signal processing and communications. Mastorakis, N. (ed.). New York, USA: WSEAS Press, p. 25-29 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  7. On teaching embedded systems design to electrical engineering students

    Wong, JSSM. & Cotofana, SD., 2002, 3rd International conference on information communication technologies in education. Fernstrom, K. (ed.). Athens: National and Kapodistrian University of Athens, p. 505-515 11 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  8. Parallel multiple-symbol variable-length decoding

    Nikara, J., Vassiliadis, S., Takala, J., Sima, M. & Liuha, P., 2002, ICCD 2002; Proceedings 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors. Werner, B. (ed.). Piscataway, NJ. USA: IEEE Society, p. 126-131 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. Performance benefits for special-purpose instructions in the CSI architecture

    Cheresiz, D., Juurlink, BHH. & Vassiliadis, S., 2002, Proceedings ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 236-241 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  10. Performance scalability of multimedia instruction set extensions

    Cheresiz, D., Juurlink, BHH., Vassiliadis, S. & Wijshoff, HAG., 2002, Euro-Par 2002 Parallel processing. Monien, B. & Feldmann, R. (eds.). Berlin: Springer, p. 849-861 13 p. (Lecture Notes in Computer Science; vol. 2400).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. Quasi on-line testing of embedded random access memory

    Demidenko, S., Lord, N., van de Goor, AJ. & Piuri, V., 2002, MPCS '02 Proceedings of the 2002 Euromicro conference on Massively-parallel computing systems. Fort Collins, Colorado, USA: The National Technological University Press, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  12. Reconfigurable DWT unit based on lifting

    Kuzmanov, GK., Zafarifar, B., Shrestha, P. & Vassiliadis, S., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 325-333 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  13. Reconfigurable implementation for the AES Algorithm

    Ashruf, CMA., Gaydadjiev, GN. & Vassiliadis, S., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 169-172 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  14. Reconfigurable repetitive padding unit

    Kuzmanov, GK. & Vassiliadis, S., 2002, GLSVLSI '02 Proceedings of the 12th ACM Great Lakes symposium on VLSI. New York: Association for Computing Machinery (ACM), p. 98-103 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  15. Selecting the optimal tile size for low-power tile-based rendering

    Antochi, I., Juurlink, BHH. & Vassiliadis, S., 2002, Proceedings ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  16. SmartCam: Devices for Embedded Intelligent Cameras

    Caarls, W., Jonker, PP. & Corporaal, H., 2002, 3rd PROGRESS Workshop on Embedded Systems, Proceedings (CD-ROM). Schweizer, M. (ed.). Utrecht: STW, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  17. Static buffered SET based logic gates

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2002, IEEE-NANO 2002; Proceedings of the 2002 2nd IEEE Conference on Nanotechnology. Piscataway, NJ. USA: IEEE Society, p. 491-494 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  18. Symbolic performance prediction of data-dependent parallel programs

    Gautama, H. & van Gemund, AJC., 2002, Computer performance evaluation; Modelling techniques and Tools. Field, T. & et al. (eds.). Berlin: Springer, p. 259-279 21 p. (Lecture Notes in Computer Science; vol. 2324).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  19. Synthetic benchmark generator for the MOLEN processor

    Wong, JSSM., Luo, G. & Cotofana, SD., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 561-567 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  20. Test point insertion that facilitates ATPG in reducing test time and data volume

    Geuzebroek, MJ., van Linden, JT. & van de Goor, AJ., 2002, Proceedings International Test Conference 2002. Piscataway, NJ, USA: IEEE Society, p. 138-148 11 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  21. Testing static and dynamic faults in random access memories

    Hamdioui, S., Al-Ars, Z. & van de Goor, AJ., 2002, 20th VLSI Test symposium; Proceedings. Piscataway, NJ, USA: IEEE Society, p. 395-401 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  22. The Delft-Java engine

    Glossner, CJ. & Vassiliadis, S., 2002, Java microarchitectures. Narayanan, V. & Wolckzo, MI. (eds.). Boston: Kluwer Academic Publishers, p. 105-123 17 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  23. Threshold logic parallel counters for 32-bit multipliers

    Celinski, P., Cotofana, SD. & Abbott, D., 2002, International symposium on smart materials, Nano-, and micro-smart systems 2002. s.n. (ed.). Belingham: SPIE, p. 205-214 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  24. Through testing of any multiport memory with linear tests

    Hamdioui, S. & van de Goor, AJ., 2002, In : IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 21, 2, p. 217-232 16 p.

    Research output: Contribution to journalArticleScientificpeer-review

  25. Trading efficiency for energy in a texture cache architecture

    Antochi, I., Juurlink, BHH., Cilio, AGM. & Liuha, P., 2002, Proceedings of the 2002 Euromicro conference on Massively-parallel computing systems. Fort Collins, Colorado, USA: The National Technological University Press, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  26. Unstructured agent matchmaking: experiments in timing and fuzzy matching

    Ogston, EFYL. & Vassiliadis, S., 2002, Applied computing 2002: Proceedings of the 2002 ACM symposium on applied computing. New York: Association for Computing Machinery (ACM), p. 300-306 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  27. Wireless SDR solutions: The challenge and promise of next generation handsets

    Glossner, CJ., Hokenek, E. & Moudgill, M., 2002, CDC 2002 Communications Design Conference Proceedings. CMP Media LLC, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  28. Y'UV-to-R'G'B' color space conversion on FPGA-augmented TriMedia-32 processor

    Sima, M., Vassiliadis, S., van Eijndhoven, JTJ. & Cotofana, SD., 2002, Proceeding ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 465-471 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  29. 2003
  30. 3D graphics benchmarks for low-power architectures

    Antochi, I., Juurlink, BHH., Vassiliadis, S. & Liuha, P., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 18-22 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  31. A fast CRC update implementation

    Lu, W. & Wong, JSSM., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 113-120 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  32. A fault primitive based analysis of dynamic memory faults

    Hamdioui, S., Gaydadjiev, GN. & van de Goor, AJ., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 84-89 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  33. A fault primitive based analysis of linked faults in RAMs

    Al-Ars, Z., Hamdioui, S. & van de Goor, AJ., 2003, MTDT 2003; Records of the 2003 international workshop on memory technology, design and testing. s.n. (ed.). Piscataway: IEEE Society, p. 33-39 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  34. A flexible simulator of pipelined processors

    Juurlink, BHH., Bertels, KLM. & Li, B., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 483-493 11 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  35. A hierarchical sparse matrix storage format for vector processors

    Stathis, PT., Vassiliadis, S. & Cotofana, SD., 2003, IPDPS 2003; 17th international parallel and distributed processing symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  36. A reconfigurable baseband for 2.5G/3G and beyond

    Glossner, CJ., Iancu, D., Hokenek, E. & Moudgill, M., 2003, WWC'2003 Proceedings; proceedings of 2003 world wireless congress. s.n. (ed.). San Francisco: Delson Group Inc., p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  37. A software-defined communications baseband design

    Glossner, CJ., Iancu, D., Lu, J., Hokenck, E. & Moudgill, M., 2003, In : IEEE Communications Magazine. 41, 1, p. 4-12 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  38. A systematic method for modifying march tests for bit-oriented memories into tests for word-oriented memories

    van de Goor, AJ. & Tlili, IBS., 2003, In : IEEE Transactions on Computers. 52, 10, p. 1320-1330 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  39. A-DELTA: a 64-bit high speed, compact, hybrid dynamic-CMOS/ threshold-logic adder

    Celinski, P., Cotofana, SD. & Abbott, D., 2003, Computational methods in neural modeling; seventh international work-conference on artificial and natural networks, IWANN 2003. Mira, J. & Álvarez, JR. (eds.). Berlin: Springer, p. 73-80 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  40. An investigation into multicasting

    Manolov, N., Gamil, A. & Wong, JSSM., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 523-528 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  41. Analyzing the impact of process variations on DRAM testing using border resistance traces

    Al-Ars, Z. & van de Goor, AJ., 2003, ATS 2003; proceedings of the twelfth Asian test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 24-27 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  42. Arbitrating instructions in an ¿¿-coded CCM

    Kuzmanov, GK. & Vassiliadis, S., 2003, Field-programmable logic and applications; 13th international conference, FPL 2003. Cheung, PYK., Constantinides, GA. & de Sousa, JT. (eds.). Berlin: Springer, p. 81-90 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  43. Area efficient, High speed parallel counter circuits using charge recycling threshold logic

    Celinski, P., Abbott, D. & Cotofana, SD., 2003, ISCAS 2003; Proceedings of the 2003 IEEE international symposium on circuits and systems. Piscataway: IEEE Society, p. 233-236 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  44. Building blocks for electron counting arithmetic

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 222-228 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  45. CMOS implementation of generalized threshold functions

    Padure, MD., Cotofana, SD. & Vassiliadis, S., 2003, Computatational methods in neural modeling: seventh international work-conference on artificial and natural neural networks, IWANN 2003. Mira, J. & Álvarez, JR. (eds.). Berlin: Springer, p. 65-72 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  46. Color space conversion for MPEG decoding on FPGA-augmented trimedia processor

    Sima, M., Vassiliadis, S., Cotofana, SD. & van Eijndhoven, JTJ., 2003, ASAP 2003; Proceedings 2003, the IEEE international conference on application-specific systems, archtectures and processors. Deprettere, E., Bhattacharyya, S., Cavallaro, J., Darte, A. & Thiele, L. (eds.). Piscataway: IEEE Society, p. 250-259 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  47. Combined multiplication and sum-of-squares units

    Schulte, MJ., Marquette, L., Krithivasan, S., Walters, EG. & Glossner, CJ., 2003, ASAP 2003; Proceedings 2003, the IEEE international conference on application-specific systems, archtectures and processors. Deprettere, E., Bhattacharyya, S., Cavallaro, J., Darte, A. & Thiele, L. (eds.). Piscataway: IEEE Society, p. 204-215 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  48. Compiling for the molen programming paradigm

    Panainte, E., Bertels, KLM. & Vassiliadis, S., 2003, PA3CT; Program acceleration through application and architecture driven code transformations Symposium Proceedings. s.n. (ed.). s.l.: s.n., p. 41-43 3 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  49. Compiling for the molen programming paradigm

    Panainte, E., Bertels, KLM. & Vassiliadis, S., 2003, Field-programmable logic and applications; 13th international conference, FPL 2003. Cheung, PYK., Constantinides, GA. & de Sousa, JT. (eds.). Berlin: Springer, p. 900-910 11 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  50. Computer graphics and the MOLEN paradigm: a survey

    Calderón, H. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 23-36 14 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  51. Concurrent engineering for intelligent simulation

    Niculiu, T. & Cotofana, SD., 2003, ECEC 2003, tenth European concurrent engineering conference, tenth anniversary conference. Baake, U., Herbst, J. & Graessler, I. (eds.). Gehnt, Belgium: Eurosis, p. 95-99 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  52. Consequences of RAM bitline twisting for test coverage

    Schanstra, I. & van de Goor, AJ., 2003, DATE'03; design automation and test in Europe. Wehn, N. & Verkest, D. (eds.). Piscataway: IEEE Society, p. 1176-1177 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  53. D-SAB: a sparse matrix benchmark suite

    Stathis, PT., Vassiliadis, S. & Cotofana, SD., 2003, Parallel computing technologies; seventh international conference, PaCt 2003. Malyshkin, V. (ed.). Berlin: Springer, p. 549-554 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  54. Data cache optimization in multimedia applications

    Molnos, AM., Heijligers, MJM., Cotofana, SD., van Eijndhoven, JTJ. & Mesman, SD., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 529-532 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  55. Design and experimental results of a CMOS flip-flop featuring embedded threshold logic

    Padure, MD., Cotofana, SD. & Vassiliadis, S., 2003, ISCAS 2003; Proceedings of the 2003 IEEE international symposium on circuits and systems. Piscataway: IEEE Society, p. 253-256 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  56. Design tradeoffs for an embedded open GL-compliant hardware rasterizer

    Crisu, D., Cotofana, SD. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. Utrecht: STW, p. 49-55 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  57. Detecting intra-word faults in word-oriented memories

    Hamdioui, S., van de Goor, AJ. & Rodgers, M., 2003, 21th IEEE VLSI test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 241-247 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  58. Dynamic faults in random-access-memories: concept, fault models and tests

    Hamdioui, S., Al-Ars, Z., van de Goor, AJ. & Rodgers, M., 2003, In : Journal of Electronic Testing: theory and applications. 19, 2, p. 195-205 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  59. Efficient filtering with the co-vector processor

    Dang, BL., Engin, N. & Gaydadjiev, GN., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 351-356 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  60. Evaluation methodology for single electron encoded threshold logic gates

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2003, VLSI-SoC 2003; IFIP WG 10.5 international conference on very large scale integration of system-on-chip. Glesner, M., Reis, R., Eveking, H., Mooney, V., Indrusiak, L. & Zipf, P. (eds.). Darmstadt, Germany: Technische Universität Darmstadt, p. 258-262 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  61. FPGA-based variable length decoders

    Nikara, J., Vassiliadis, S., Takala, J. & Liuha, P., 2003, IFIP VLSI-SoC 2003; IFIP WG 10.5 international conference on very large scale integration of system-on-chip. Glesner, M., Eveking, H., Indrusiak, LS., Reis, R., Mooney, V. & Zipf, P. (eds.). Darmstadt, Germany: Technische Universität Darmstadt, p. 437-441 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  62. Future challenges in memory testing

    Hamdioui, S. & Gaydadjiev, GN., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 78-83 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  63. Hardware acceleration of the SRP authentication protocol

    Groen, P., Hämäläinen, P., Juurlink, BHH. & Hämäläinen, T., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 70-77 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  64. Heterogeneous trading agents

    Neuberg, L. & Bertels, KLM., 2003, In : Complexity. 8, 5, p. 28-35 8 p.

    Research output: Contribution to journalArticleScientific

  65. Hierarchical simulated reconfigurable intelligence templates

    Niculiu, T. & Cotofana, SD., 2003, Proceedings of the IASTED international conference on intelligent systems and control. Hamza, MH. (ed.). Anaheim: ACTA Press, p. 39-44 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  66. High-level energy estimation for ARM-based SOCs

    Crisu, D., Cotofana, SD. & Vassiliadis, S., 2003, Third international workshop on systems, architectures, modeling, and simulation. s.n. (ed.). Leiden: SAMOS Initiative, p. 148-153 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  67. Implementation of MPEG-4 on the Philips co vector processor

    An, B., Balakrishnan, S., Cheresiz, D., Juurlink, BHH. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 8-17 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  68. Implementation of a streaming execution unit

    Cheresiz, D., Juurlink, BHH., Vassiliadis, S. & Wijshoff, HAG., 2003, In : Journal of Systems Architecture. 49, p. 599-617 19 p.

    Research output: Contribution to journalArticleScientificpeer-review

  69. Implementing 2D memory buffers for MPEG

    Haverkamp, MB., Kuzmanov, GK. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 90-94 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  70. Importance of dynamic faults for new SRAM technologies

    Hamdioui, S., Wadsworth, R., Reyes, JD. & van de Goor, AJ., 2003, ETW 2003; Eighth IEEE European test workshop. s.n. (ed.). Piscataway: IEEE Society, p. 29-34 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  71. Introduction

    van de Goor, AJ., Jha, N. & Gupta, S., 2003, Testing of digital systems. Cambridge: Cambridge University Press, p. 1-25 25 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  72. Inverse quantization on FPGA-augmented trimedia

    Sima, M., Vassiliadis, S., Cotofana, SD. & van Eijndhoven, JTJ., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 153-157 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  73. Loading ¿¿-code: design considerations

    Kuzmanov, GK., Gaydadjiev, GN. & Vassiliadis, S., 2003, Third international workshop on systems, architectures, modeling, and simulation. s.n. (ed.). Leiden: SAMOS Initiative, p. 8-11 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  74. Logical and topological testing of scrambled RAMs

    Schanstra, I. & van de Goor, AJ., 2003, LATW 2003 Fourth IEEE Latin-American test workshop. s.n. (ed.). s.l.: s.n., p. 66-71 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  75. Logical effort delay modeling of sense amplifier based charge recycling threshold logic gates

    Celinski, P., Cotofana, SD. & Abbott, D., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 43-48 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  76. Mapping of motion estimation on a VLIW processor template

    Snirpunas, A., van der Wel, A. & Wong, JSSM., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 571-576 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  77. March SL: a test for all static linked memory faults

    Hamdioui, S., Al-Ars, Z., van de Goor, AJ. & Rodgers, M., 2003, ATS 2003; proceedings of the twelfth Asian test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 372-377 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  78. Massively parallel array processor

    Pechanek, GG., Vassiliadis, S. & Delgado-Frias, JG., 2003, Patent No. US 6,405,185 B1, Priority date 11 Jun 2002

    Research output: PatentOther research output

  79. Memory testing

    van de Goor, AJ., Jha, N. & Gupta, S., 2003, Testing of digital systems. Cambridge: Cambridge University Press, p. 845-892 48 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  80. Microcode processing: positioning and directions

    Vassiliadis, S., Wong, JSSM. & Cotofana, SD., 2003, In : IEEE Micro. 23, 1, p. 21-30 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  81. Multiple communication protocols for sorftware defined radio

    Glossner, CJ., Iancu, D., Nacer, G., Stanley, S., Hokenek, E. & Moudgill, M., 2003, IEE colloquium on DSPenabledRadio. Stewart, RW. & Garcia-Alis, D. (eds.). Stevenage: IEE, p. 227-236 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  82. On computing addition related arithmetic operations via controlled transport of charge

    Cotofana, SD., Lageweg, CR. & Vassiliadis, S., 2003, ARITH-16 2003; 16th IEEE symposium on computer arithmetic. Bajard, J. & Schulte, M. (eds.). Piscataway: IEEE Society, p. 245-252 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  83. On the use of Pierson distributions for the performance prediction of parallel programs

    Reijns, GL., van Gemund, AJC. & Gautama, H., 2003, Performance evaluation - stories and perspectives. Kotsis, G. (ed.). Wien: Österreichische Computer Gesellschaft, p. 365-379 15 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  84. Optimal broadcast on parallel locality models

    Juurlink, BHH., Kolman, P., Meyer Auf Der Heide, F. & Rieping, I., 2003, In : Journal of Discrete Algorithms (Amsterdam). 1, p. 151-166 16 p.

    Research output: Contribution to journalArticleScientificpeer-review

  85. Optimizing stresses for testing DRAM cell defects using electrical simulations

    Al-Ars, Z., van de Goor, AJ., Braun, J. & Richter, D., 2003, DATE '03; design, automation and test in Europe. Wehn, N. & Verkest, D. (eds.). Piscataway: IEEE Society, p. 484-489 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  86. Parallel computer architecture and instruction-level parallelism

    Vassiliadis, S., Dimopoulos, N., Collard, JF. & Bode, A., 2003, In : Lecture Notes in Computer Science. p. 541-542 2 p.

    Research output: Contribution to journalArticleScientific

  87. Polymorphic processors: how to expose arbitrary hardware functionality to programmers

    Vassiliadis, S., Wong, JSSM., Gaydadjiev, GN. & Bertels, KLM., 2003, The IEE FPGA developers' forum. s.n. (ed.). London: IEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  88. Power control of a processor using hardware structures controlled by a compiler with an accumulated instruction profile

    Altman, ER., Glossner, CJ., Hokenek, E., Meltzer, D. & Moudgill, M., 2003, Patent No. US 2002/0112193 A1, Priority date 15 Aug 2002

    Research output: PatentOther research output

  89. PowerPC compiler backend for the molen programming paradigm

    Panainte, E., Bertels, KLM. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 121-126 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  90. Programming the sandbridge multithraeded processor

    Jinturkar, S., Glossner, CJ. & Moudgill, M., 2003, ISPC conference proceedings; international signal processing conference. s.n. (ed.). X-CD Business Technologies, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  91. Real-time network processing: an investigation

    Wu, MY., Wong, JSSM. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 589-594 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  92. Reduced complexity software AM radio

    Iancu, D., Glossner, CJ., Ye, H., Abdelila, Y. & Stanley, S., 2003, SympTIC'03; Joint first workshop on mobile future and symposium on trends in communications. s.n. (ed.). Piscataway: IEEE Society, p. 122-125 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  93. Reducing conflict misses in caches

    de Langen, P. & Juurlink, BHH., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 505-510 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  94. Robust recognition of small-vocabulary telephone-quality speech

    Burileanu, D., Sima, M., Negrescu, C. & Croitoru, V., 2003, Speech technology and human-computer dialogue; proceedings of the second conference. s.n. (ed.). Bucure¿ti: Editura Academiei Române, p. 145-154 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  95. SCISM IA-32 binary translator

    Koukourechkov, E., Grozdanov, N., Gaydadjiev, GN. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 501-504 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  96. Sandbridge software tools

    Glossner, CJ., Dorward, S., Jinturkar, S., Moudgill, M., Hokenek, E., Schulte, M. & Vassiliadis, S., 2003, Third international workshop on systems, architectures, modeling, and simulation. s.n. (ed.). Leiden: SAMOS Initiative, p. 142-147 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  97. Single electron encoded SET memory elements

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 214-221 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  98. Single electron encoded logic memory elements

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2003, IEEE-NON 2003; 2003 Third IEEE conference on nantechnology. s.n. (ed.). Piscataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  99. Software defined global positioning satellite receiver

    Iancu, D., Glossner, CJ., Kotlyar, V., Ye, H., Moudgill, M. & Hokenek, E., 2003, SDR'03; Proceedings of the 2003 software defined radio technical conference. s.n. (ed.). s.l.: SDR forum, p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  100. State-of-the-art in CMOS threshold-logic VSLI gate implementations and applications

    Celinski, P., Cotofana, SD., López, JF., Al-Sarawi, S. & Abbott, D., 2003, Microtechnologies for the new millenium 2003. s.n. (ed.). Bellingham: SPIE, p. 53-64 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  101. Static and dynamic behavior of memory cell array spot defects in embedded DRAMs

    Al-Ars, Z. & van de Goor, AJ., 2003, In : IEEE Transactions on Computers. 52, 3, p. 293-309 17 p.

    Research output: Contribution to journalArticleScientificpeer-review

  102. System and method including distributed instruction buffers holding a second instruction form

    Altman, ER., Glossner, CJ., Hokenek, E. & Moudgill, M., 2003, Patent No. US 2002/0161987 A1, Priority date 31 Oct 2002

    Research output: PatentOther research output

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