1. 2012
  2. BTI Impacts on logical gates in nano-scale CMOS technology

    Seyab, MSK., Hamdioui, S., Kukner, H., Catthoor, F. & Raghavan, P., 2012, 15th IEEE Symposium on design and diagnostics of electronic circuits and systems. s.n. (ed.). s.l.: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  3. Communication-aware HW/SW co-design for heterogeneous multicore platforms

    Ashraf, I., Ostadzadeh, SA., Meeuws, RJ. & Bertels, KLM., 2012, 10th International workshop on dynamic analysis. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  4. Comparative BTI analysis in nano-scale circuits lifetime

    Seyab, MSK., Hamdioui, S. & Catthoor, F., 2012, 4th Workshop on design for reliability. s.n. (ed.). s.l.: s.n., p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  5. Comparative analysis of soft and hard on-chip interconnects for FPGAs

    Hur, JY., Goossens, KGW., Mhamdi, L. & Wahlah, MA., 2012, In : IET Computers and Digital Techniques. 6, 1, p. 1-10 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  6. Compiler assisted runtime adaption

    Sima, VM., 2012, Delft. 129 p.

    Research output: ThesisDissertation (TU Delft)

  7. Conclusion: multi-core processor architectures are here to stay.

    Bertels, KLM., 2012, Hardware/Software co-design for heterogeneous multi-core platforms. Bertels, KLM. (ed.). Berlin, Germany: Springer, p. 229-231 234 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientific

  8. Context aware slope based transistor-level aging model

    Cucu Laurenciu, N. & Cotofana, SD., 2012, In : Microelectronics Reliability. 52, 9-10, p. 1-6 6 p.

    Research output: Contribution to journalArticleScientificpeer-review

  9. Customisation of on-chip network interconnects and experiments in field-programmable gate arrays

    Hur, JY., Stefanov, TP., Wong, JSSM. & Goossens, KGW., 2012, In : IET Computers and Digital Techniques. 6, 1, p. 59-68 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  10. DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler

    Nane, R., Sima, VM., Olivier, B., Meeuws, RJ., Yankova, YD. & Bertels, KLM., 2012, 22nd International conference on field programmable logic and applications. s.n. (ed.). s.l.: s.n., p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  11. Decoupled inter- and intra-application scheduling for composable and robust embedded MPSoC platforms

    Molnos, AM., Beyranvand Nejad, A., Nguyen, BT., Cotofana, SD. & Goossens, KGW., 2012, 15th Intl.Workshop on software and compilers for embedded systems. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-9 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  12. Degradation stochastic resonance (DSR) in AD-AVG architectures

    Aymerich, N., Cotofana, SD. & Rubio, A., 2012, 12th IEEE International conference on nanotechnology. s.n. (ed.). New York: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  13. Design of a pipelined and parameterized VLIW processor: r-VEX v.2.0

    Seedorf, RAE., Anjam, F., Brandon, AAC. & Wong, JSSM., 2012, 6th HiPEAC workshop on reconfigurable computing. s.n. (ed.). s.l.: s.n., p. 1-12 12 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  14. DetLock: portable and efficient deterministic execution for shared memory multicore systems

    Mushtaq, H., Al-Ars, Z. & Bertels, KLM., 2012, 5th International workshop on multi-core computing systems. s.n. (ed.). s.l.: s.n., p. 1-10 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  15. DfT schemes for resistive open defects in RRAMs

    Haron, NZB. & Hamdioui, S., 2012, Design, automation & test in Europe conference & exhibition. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  16. Efficient datapath merging for the overhead reduction of run-time reconfigurable systems

    Fazlali, M., Zakerolhosseini, A. & Gaydadjiev, GN., 2012, In : Journal of Supercomputing: an international journal of high-performance computer design, analysis and use. 59, 2, p. 636-657 22 p.

    Research output: Contribution to journalArticleScientificpeer-review

  17. Embedded computer architecture laboratory: a hands-on experience programming embedded systems with resource and energy constraints

    Nelson, AT., Molnos, AM., Beyranvand Nejad, A., Mirzoyan, D., Cotofana, SD. & Goossens, KGW., 2012, Workshop on embedded and cyber-physical systems education. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  18. Energy efficient wireless attitude determination system for spacecraft

    Gaydadjiev, GN., Amini, R. & Gill, EKA., 2012, Patent No. 2005664, Priority date 14 May 2012

    Research output: Patent

  19. Evaluation of different task scheduling policies in multi-core systems with recon¿gurable hardware

    Shahsavari, M., Al-Ars, Z. & Bertels, KLM., 2012, 8th International summer school on advanced computer architecture and compilation for high-performance and embedded systems. s.n. (ed.). s.l.: s.n., p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  20. Exploring test opportunities for memory and interconnects in 3D ICs

    Taouil, M., Lefter, M. & Hamdioui, S., 2012, International design & test symposium. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  21. Extensions of the hArtes tool chain

    Meeuws, RJ., Ostadzadeh, SA., Nawaz, Z., Lu, Y., Thomas, TM., Sabeghi, M., Sima, VM. & Sigdel, K., 2012, Hardware/Software co-design for heterogeneous multi-core platforms. Bertels, KLM. (ed.). Berlin, Germany: Springer, p. 193-227 234 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientific

  22. Fault tolerance on multicore processors using deterministic multithreading

    Mushtaq, H., Al-Ars, Z. & Bertels, KLM., 2012, International design & test symposium. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  23. Field programmable gate arrays with hardwired networks on chip

    Wahlah, MA., 2012, Delft. 229 p.

    Research output: ThesisDissertation (TU Delft)

  24. Hardware algorithms for tile-based real-time rendering

    Crisu, D., 2012, Delft. 208 p.

    Research output: ThesisDissertation (TU Delft)

  25. Impact of partial resistive defects and bias temperature instability on SRAM decoder reliablity

    Seyab, MSK., Hamdioui, S., Taouil, M., Kukner, H., Raghavan, P. & Catthoor, F., 2012, International design & test symposium. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  26. Implementation study of FFT on multi-lane vector processors

    Spinean, B. & Gaydadjiev, GN., 2012, 15th Euromicro Conference on Digital System Design. s.n. (ed.). s.l.: Euromicro, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  27. Improving DRAM performance and energy efficiency

    Spinean, B., Geursen, AAJ. & Gaydadjiev, GN., 2012, IEEE Symposium on embedded systems for real-time multimedia. s.n. (ed.). s.l.: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  28. Incorporating Parameter Variations in BTI Impact on Nano-scale Logical Gates Analysis

    Seyab, MSK., Hamdioui, S., Kukner, H., Raghavan, P. & Catthoor, F., 2012, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. s.n. (ed.). New York: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  29. Introduction

    Bertels, KLM., 2012, Hardware/Software co-design for heterogeneous multi-core platforms. Bertels, KLM. (ed.). Berlin, Germany: Springer, p. 1-8 234 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientific

  30. Is 3D integration the way to future dependable computing platforms?

    Safiruddin, S., Borodin, DV., Lefter, M., Voicu, GR. & Cotofana, SD., 2012, 3th International conference on optimization of electrical and electronic equipment. s.n. (ed.). New York: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  31. Is the road towards "zero-energy" paved with NEMFET-based power management?

    Enachescu, M., Voicu, GR. & Cotofana, SD., 2012, IEEE International symposium on circuits and systems. New York: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  32. Modeling SRAM Start-Up Behavior for Physical Unclonable Functions

    Monteiro OliveiraCortez, AM., Dargar, A., Schrijen, GJ. & Hamdioui, S., 2012, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. s.n. (ed.). New York: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  33. Multithreading on reconfigurable hardware: an architectural approach

    Zaykov, PG. & Kuzmanov, GK., 2012, In : Microprocessors and Microsystems. 36, 8, p. 695-704 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  34. On Optimizing Test Cost for Wafer-to-Wafer 3D Stacked ICs

    Taouil, M. & Hamdioui, S., 2012, 7th International conference on design & technology of integrated systems in nanoscale era. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  35. On implementability of polymorphic register files

    Ciobanu, CB., Kuzmanov, GK. & Gaydadjiev, GN., 2012, 7th InternationalWorkshop on reconfigurable communication-centric systems-on-chip. s.n. (ed.). s.n.: s.l., p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  36. On improved MANET network utilization

    Chang, Z. & Gaydadjiev, GN., 2012, Proceedings 2012 International Conference on Wireless Communications and Signal Processing. Zheng, J., Wang, X. & Di Benedetto, M-G. (eds.). Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  37. On the implementation of traps for a softcore VLIW processor

    Anjam, F., Kong, Q., Seedorf, RAE. & Wong, JSSM., 2012, 6th HiPEAC workshop on reconfigurable computing. s.n. (ed.). s.l.: s.n., p. 1-10 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  38. On virtualization of reconfigurable hardware in distributed systems

    Nadeem, MF., Nadeem, M. & Wong, JSSM., 2012, 41st International conference on parallel processing. s.n. (ed.). s.l.: s.n., p. 1-9 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  39. Online allocation for contention-free-routing NoCs

    Stefan, RA., Beyranvand Nejad, A. & Goossens, KGW., 2012, 6th International workshop on interconnection network architecture: on-chip, multi-chip. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  40. Power versus quality trade-offs for adaptive real-time applications

    Nelson, AT., Akesson, B., Molnos, AM., te Pas, SF. & Goossens, KGW., 2012, IEEE Symposium on embedded systems for real-time multimedia. s.n. (ed.). s.l.: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  41. Process-variation aware mapping of real-time streaming applications to MPSoCs for improved yield

    Mirzoyan, D., Akesson, B. & Goossens, KGW., 2012, 13th International symposium on quality electronic design. s.n. (ed.). New York: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  42. Profile-guided application partitioning for heterogeneous reconfigurable platforms

    Ostadzadeh, SA., Meeuws, RJ., Ashraf, I., Galuzzi, C. & Bertels, KLM., 2012, 16th International symposium on computer architecture and digital systems. s.n. (ed.). s.l.: s.n., p. 1-7 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  43. Quantitative application data flow characterization for heterogeneous multicore architectures

    Ostadzadeh, SA., 2012, Delft. 235 p.

    Research output: ThesisDissertation (TU Delft)

  44. Quantitative hardware prediction modeling for hardware/software co-design

    Meeuws, RJ., 2012, Delft. 187 p.

    Research output: ThesisDissertation (TU Delft)

  45. Reliability Analysis of k-out-of-n Systems with Cold Standby

    van Gemund, AJC. & Reijns, GL., 2012, In : IEEE Transactions on Reliability. 61, 2, p. 526-532 7 p.

    Research output: Contribution to journalArticleScientificpeer-review

  46. Resource allocation in time-division-multiplexed networks on chip

    Stefan, RA., 2012, Delft. 222 p.

    Research output: ThesisDissertation (TU Delft)

  47. Rule-based data communication optimization using quantitative communication profiling

    Pham Quoc Cuong, P., Al-Ars, Z. & Bertels, KLM., 2012, International conference on field-programmable technology. s.n. (ed.). New York: IEEE Society, p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  48. Run-time power-down strategies for realtime SDRAM memory controllers

    Chandrasekar, K., Akesson, B. & Goossens, KGW., 2012, Design automation conference. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  49. Scalability Study of Polymorphic Register Files

    Ciobanu, CB., Kuzmanov, GK. & Gaydadjiev, GN., 2012, 15th Euromicro Conference on Digital System Design. s.n. (ed.). s.l.: Euromicro, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  50. Scalable parallel programming applied to H.264/AVC decoding

    Juurlink, BHH., Alvarez, M., Chi, C., Pereira de Azevedo Filho, AP., Meenderinck, CH. & Ramirez, A., 2012, Berlin: Springer. 95 p.

    Research output: Book/ReportBookScientific

  51. Self-adaptive economic-based resource allocation in ad-hoc grids

    Pourebrahimi, B. & Bertels, KLM., 2012, In : International Journal of Embedded and Real-Time Communication Systems. 3, 2, p. 111-130 20 p.

    Research output: Contribution to journalArticleScientificpeer-review

  52. Simultaneous reconfiguration of issue-width and instruction cache for a VLIW processor

    Anjam, F., Carro, L., Wong, JSSM., Nazar, GL. & Rutzig, MB., 2012, International conference on embedded computer systems: architecture modeling and simulation. s.n. (ed.). New York: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  53. Statistical reliability analysis of NBTI impact on FinFET SRAMs and mitigation technique using independent-gate devices

    Wang, Y., Cotofana, SD. & Fang, L., 2012, ACM International symposium on nanoscale architectures. s.n. (ed.). New York: IEEE Society, p. 1-7 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  54. Stigmergic search with single electron tunneling technology based memory enhanced hubs

    Safiruddin, S., Peper, F. & Cotofana, SD., 2012, IEEE/ACM International Symposium on Nanoscale Architectures. s.n. (ed.). s.l.: IEEE Society, p. 1-7 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  55. Task scheduling in large-scale distributed systems utilizing partial reconfigurable processing elements

    Nadeem, F., Ashraf, I., Ostadzadeh, A., Wong, S. & Bertels, K., 2012, 26th IEEE International parallel and distributed processing symposium workshops. IEEE Society, p. 1-11

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  56. Testability and fault tolerance for emerging nanoelectronic memories

    Haron, NZB., 2012, Delft. 138 p.

    Research output: ThesisDissertation (TU Delft)

  57. The Q² profiling framework: driving application mapping for heterogeneous reconfigurable platforms

    Ostadzadeh, SA., Meeuws, RJ., Ashraf, I., Galuzzi, C. & Bertels, KLM., 2012, 8th International symposium on applied reconfigurable computing. Choy, OCS. (ed.). Berlin: Springer, p. 1-13 13 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  58. The hArtes tool chain

    Bertels, KLM., Meeuws, RJ., Yankova, YD., Sima, VM. & Sigdel, K., 2012, Hardware/Software co-design for heterogeneous multi-core platforms. Bertels, KLM. (ed.). Berlin, Germany: Springer, p. 9-109 234 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientific

  59. The hArtesplatform

    Kuzmanov, GK., Tripiccione, R., Marchiori, G. & Colacicco, I., 2012, Hardware/Software co-design for heterogeneous multi-core platforms. Bertels, KLM. (ed.). Berlin, Germany: Springer, p. 111-123 234 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientific

  60. Unbalanced multiple description wavelet coding for scalable video transmission

    Choupani, R., Wong, JSSM. & Tolun, MR., 2012, In : Journal of Electronic Imaging. 21, 4, p. 1-11 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  61. Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures

    Mariani, GS., Sima, VM., Palermo, G., Zaccaria, V., Silvano, C. & Bertels, KLM., 2012, Design, automation & test in Europe conference & exhibition. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  62. Variation tolerant on-chip degradation sensors for dynamic reliability management systems

    Wang, Y., Enachescu, M., Cotofana, SD. & Fang, L., 2012, In : Microelectronics Reliability. 52, 9-10, p. 1-6 6 p.

    Research output: Contribution to journalArticleScientificpeer-review

  63. Yield improvement for 3D wafer-to-wafer stacked memories

    Taouil, M. & Hamdioui, S., 2012, In : Journal of Electronic Testing: theory and applications. 28, 4, p. 523-534 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  64. Zero-performance-overhead online fault detection and diagnosis in 3D stacked integrated circuits

    Safiruddin, S., Lefter, M., Borodin, DV., Voicu, GR. & Cotofana, SD., 2012, ACM International symposium on nanoscale architectures. s.n. (ed.). New York: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  65. 2011
  66. A Cache Architecture for Counting Bloom Filters: Theory and Application

    Ahmadi, M. & Wong, JSSM., 2011, In : Journal of Electrical and Computer Engineering. 2011, p. 1-10 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  67. A Non-Intrusive Online FPGA Test Scheme Using A Hardwired Network on Chip

    Wahlah, MA. & Goossens, KGW., 2011, 14th Euromicro Conference on Digital System Design. Kitsos, P. (ed.). Piscataway: IEEE Society, p. 351-359 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  68. A Novel Dynamic Task Scheduling Algorithm for Grid Networks with Reconfigurable Processors

    Nadeem, MF., Ostadzadeh, SA., Ahmadi, M., Nadeem, M. & Wong, JSSM., 2011, 5th HiPEAC Workshop on Reconfigurable Computing. s.n. (ed.). s.l.: HiPEAC, p. 21-30 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  69. A Reconfigurable Audio Beamforming Multi-Core Processor

    Theodoropoulos, D., Kuzmanov, GK. & Gaydadjiev, GN., 2011, International Symposium on Applied Reconfigurable Computing. Koch, A., Krishnamurthy, R., McAllister, J., Woods, R. & El-Ghazawi, T. (eds.). Heidelberg: Springer, p. 3-14 12 p. (Lecture Notes in Computer Science; vol. 6578).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  70. A Simulation Framework for Reconfigurable Processors in Large-scale Distributed Systems

    Nadeem, MF., Ostadzadeh, SA., Nadeem, M., Wong, JSSM. & Bertels, KLM., 2011, International Workshop on Scheduling and Resource Management for Parallel and Distributed Systems. Sheu, JP. & Wang, CL. (eds.). Piscataway: IEEE Society, p. 352-360 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  71. A Unified Execution Model for Data-Driven Applications on a Composable MPSoC

    Beyranvand Nejad, A., Molnos, AM. & Goossens, KGW., 2011, Proceedings 14th Euromicro Conference on Digital System Design. Kitsos, P. (ed.). Los Alamitos, CA, USA: IEEE Society, p. 818-822 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  72. A Uni¿ed Aging Model of NBTI and HCI Degradation towards Lifetime Reliability Management for Nanoscale MOSFET Circuits

    Wang, Y., Cotofana, SD. & Fang, L., 2011, 2011 IEEE/ACM International Symposium on Nanoscale Architectures. Moritz, CA. & O'Connor, I. (eds.). Piscataway, NJ, USA: IEEE Society, p. 175-180 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  73. Acceleration of Bioinformatics Sequence Alignment - A Hardware Perspective

    Hasan, L., 2011, Germany: LAP LAMBERT Academic Publishing. 132 p.

    Research output: Book/ReportBookScientific

  74. Advanced Profiling of Applications for Heterogeneous Multi-Core Platforms

    Bertels, KLM., Meeuws, RJ. & Ostadzadeh, SA., 2011, Proceedings of 2011 International Conference on Engineering of Reconfigurable Systems & Algorithms. Plaks, TP. (ed.). CSREA Press, p. 171-183 13 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  75. An Efficient FPGA Design of Residue-to-Binary Converter for the Moduli Set {2n+1,2n,2n-1},

    Gbolagade, KA., Voicu, GR. & Cotofana, SD., 2011, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 19, 8, p. 1500-1503 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  76. An Efficient Hardware Design for Intra-prediction in H.264/AVC Decoder

    Nadeem, M., Wong, JSSM. & Kuzmanov, GK., 2011, Saudi International Electronics, Communications and Photonics Conference 2011 (SIECPC). s.n. (ed.). Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  77. An FPGA Bridge Preserving Traffic Quality of Service for On-Chip Network-Based Systems

    Beyranvand Nejad, A., Escudero Martinez, M. & Goossens, KGW., 2011, Design, Automation and Test in Europe Conference and Exhibition (DATE 2011). Al-Hashimi, BM. (ed.). Leuven, Belgium: EDAA, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  78. An Instruction to Accelerate Software Caches

    Pereira de Azevedo Filho, AP. & Juurlink, BHH., 2011, Proceedings of the 2011 Conference on Architecture of Computing Systems. Berekovic, M., Fornaciari, W., Brinkschulte, U. & Silvano, C. (eds.). Heidelberg: Springer, p. 158-170 13 p. (Lecture Notes in Computer Science; vol. LNCS 6566).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  79. An Overview of Hardware-based Acceleration of Biological Sequence Alignment

    Hasan, L. & Al-Ars, Z., 2011, Computational Biology and Applied Bioinformatics. Lopes, HS. & Cruz, LM. (eds.). Reijka, Croatia: Intech, p. 187-202 442 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientific

  80. An improved algorithm for slot selection in the Æthereal Network-on-Chip

    Stefan, RA. & Goossens, KGW., 2011, Proceedings of the Fifth ACM Interconnection Network Architecture, On-Chip Multi-Chip Workshop (INA-OCMC). Flich, J., Bertozzi, D., Skei, T. & Ludovici, D. (eds.). New York, NY, USA: Association for Computing Machinery (ACM), p. 7-10 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  81. Analysis and Test Development for Parasitic Fails in Deep Sub-Micron Memory Devices

    Irobi, IS., 2011, Delft: IS Irobi. 132 p.

    Research output: ThesisDissertation (TU Delft)

  82. Analysis of delay mismatching of digital circuits caused by common environmental fluctuations

    Andrade, D., Rubio, A., Calomarde, A. & Cotofana, SD., 2011, Proceedings 2011 IEEE International Symposium on Circuits and Systems. Silva, EAB. & Lande, TS. (eds.). Piscataway, NJ, USA: IEEE Society, p. 2585-2588 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  83. Architectural Support for Multithreading on Reconfigurable Hardware

    Zaykov, P. & Kuzmanov, GK., 2011, International Symposium on Applied Reconfigurable Computing. Koch, A., Krishnamurthy, R., McAllister, J., Woods, R. & El-Ghazawi, T. (eds.). Heidelberg: Springer, p. 363-374 12 p. (Lecture Notes in Computer Science; vol. 6578).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  84. Collaboration of reconfigurable processors in grid computing: Theory and application

    Ahmadi, M., Shahbahrami, A. & Wong, JSSM., 2011, In : Future Generation Computer Systems: the international journal of grid computing: theory, methods and applications. 27, 6, p. 850-859 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  85. Communication Service for hardware tasks executed on dynamic and partial reconfigurable resources

    Narayanan, S., Devaux, L. & Sourdis, I., 2011, 2011 IEEE/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC). Tsui, C-Y. & Mir, S. (eds.). Piscataway, NJ, USA: IEEE Society, p. 196-199 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  86. Compatibility study of compile-time optimizations for power and reliability

    Nazarian, G., Strydis, C. & Gaydadjiev, GN., 2011, 14th Euromicro Conference on Digital System Design. Kitsos, P. (ed.). Piscataway: IEEE Society, p. 809-813 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  87. Composable Local Memory Organisation for Streaming Applications on Embedded MPSoCs

    Ambrose, JA., Molnos, AM., Nelson, AT., Cotofana, SD., Goossens, KGW. & Juurlink, BHH., 2011, 8th ACM International Conference on Computing Frontiers. Cascaval, C., Trancoso, P. & Prasanna, V. (eds.). New York, NY, USA: Association for Computing Machinery (ACM), p. 1-2 2 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  88. Composable power management with energy and power budgets per application

    Nelson, AT., Molnos, AM. & Goossens, KGW., 2011, Proceedings 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. Carro, L. & Pimentel, AD. (eds.). Piscataway, NJ, USA: IEEE Society, p. 396-403 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  89. Cost-Efficient Fault-Tolerant Decoder for Hybrid Nanoelectronic Memories

    Haron, NZB. & Hamdioui, S., 2011, Proceedings Design, Automation and Test in Europe Conference and Exhibition (DATE 2011). Al-Hashimi, BM. & Rosenstiel, W. (eds.). Piscataway, NJ, USA: IEEE Society, p. 265-268 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  90. Custom Architecture for Immersive-Audio Applications

    Theodoropoulos, D., 2011, 160 p.

    Research output: ThesisDissertation (TU Delft)

  91. Customizable Memory Schemes for Data Parallel Accelerators

    Gou, C., 2011, 190 p.

    Research output: ThesisDissertation (TU Delft)

  92. Customizing and Hardwiring On-chip Interconnects in FPGAs

    Hur, JY., 2011, Delft: Jae Young Hur. 120 p.

    Research output: ThesisDissertation (TU Delft)

  93. DOPA: GPU-based protein alignment using database and memory access optimizations

    Hasan, L., Kentie, M. & Al-Ars, Z., 2011, In : BMC Research Notes. 4:261, p. 1-11 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  94. Design and implementation of an operating system for composable processor sharing

    Hansson, A., Molnos, AM., Nelson, AT., Ambrose, JA. & Goossens, KGW., 2011, In : Microprocessors and Microsystems. 35, p. 246-260 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  95. ERA-Embedded reconfigurable architectures

    Wong, JSSM., Carro, L., Rutzig, M., Mota Mattos, D., Giorgi, R., Puzovic, N., Kaxiras, S., Cintra, M., Desoli, G., Gai, P., McKee, S. & Zaks, A., 2011, Reconfigurable Computing - From FPGAs to Hardware/Software Codesign. Cardoso, JMP. & Hubner, M. (eds.). Berlin - Heidelberg: Springer, p. 239-260 290 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientific

  96. Early Results from ERA¿Embedded Reconfigurable Architectures

    Wong, JSSM., Brandon, AAC., Anjam, F. & Seedorf, RAE., 2011, IEEE 9th International Conference on Industrial Informatics. Gomes, L. & Colombo, A. (eds.). Piscataway, NJ, USA: IEEE Society, p. 816-822 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  97. Efficient Runtime Management of Reconfigurable Hardware Resources

    Thomas, TM., 2011, Delft: Thomas Marconi. 150 p.

    Research output: ThesisDissertation (TU Delft)

  98. Efficient execution of video applications on heterogeneous multi- and many-core processors,

    Pereira de Azevedo Filho, AP., 2011, 160 p.

    Research output: ThesisDissertation (TU Delft)

  99. Elastic Pipeline: Addressing GPU On-chip Shared Memory Bank Conflicts

    Gou, C. & Gaydadjiev, GN., 2011, Proceedings of the 8th ACM International Conference on Computing Frontiers. Prasanna, V. & Trancoso, P. (eds.). New York, NY, USA: Association for Computing Machinery (ACM), p. 1-11 11 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  100. Exploiting Network-on-Chip Structural Redundancy for a Cooperative and Scalable Built-In Self-Test Architecture

    Strano, A., Gomez, C., Ludovici, D., Favalli, M., Gomez, ME. & Bertozzi, D., 2011, Proceedings Design, Automation and Test in Europe Conference and Exhibition (DATE 2011). Al-Hashimi, BM. & Rosenstiel, W. (eds.). Piscataway, NJ, USA: IEEE Society, p. 661-666 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  101. Exploiting SPMD Horizontal Locality

    Gou, C. & Gaydadjiev, GN., 2011, In : IEEE Computer Architecture Letters. 10, 1, p. 20-23 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  102. Functional Unit Sharing Between Stacked Processors in 3D Integrated Systems

    Borodin, D., Siauw, WG. & Cotofana, SD., 2011, Proceedings International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. Carro, L. & Pimentel, A. (eds.). Piscataway, NJ, USA: IEEE Society, p. 311-317 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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