1. 2009
  2. Reconfigurable sparse/dense matrix-vector multiplier

    Kuzmanov, GK. & Taouil, M., 2009, 2009 intl. conf. on field-programmable technology. Bergmann, N., Diessel, O. & Shannon, L. (eds.). Piscataway: IEEE Society, p. 483-488 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  3. Recursive variable expansion for high performance computing

    Nawaz, Z. & Bertels, K., 2009, Advanced computer architecture and compilation for embedded systems. s.n. (ed.). s.l.: HiPEAC, p. 85-88 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  4. Recursive variable expansion for high performance computing

    Nawaz, Z. & Bertels, K., 2009.

    Research output: Contribution to conferencePosterProfessional

  5. Residue-based code for reliable hybrid memories

    Haron, NZB. & Hamdioui, S., 2009, 2009 IEEE/ACM international symposium on nanoscale architectures. s.n. (ed.). Piscataway: IEEE Society, p. 27-32 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  6. Residue-to-binary converters for the moduli set {2 2n+1, 2 2n, 2n-1}

    Gbolagade, KA., Chaves Fernandes, R., Sousa, L. & Cotofana, SD., 2009, 2nd International Conference on Adaptive Science & Technology. s.n. (ed.). Piscataway: IEEE Society, p. 26-33 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  7. Residue-to-decimal converters for moduli sets with common factors

    Gbolagade, KA. & Cotofana, SD., 2009, 2009 52nd IEEE international midwest symposium on circuits and systems. s.n. (ed.). Piscataway: IEEE Society, p. 624-627 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  8. Resource discovery with dynamic matchmakers in ad hoc grid

    Abdullah, MT., Mhamdi, LL., Pourebrahimi, B. & Bertels, K., 2009, The fourth international conference on systems. Ege, R., Quatttrociocchi, W., Dragomirescu, D. & Dini, O. (eds.). Piscataway: IEEE Society, p. 138-144 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  9. Run-time FPGA testing using hardwired network on chip

    Wahlah, MA. & Goossens, KGW., 2009, 20th annual workshop on circuits, systems and signal processing. s.n. (ed.). Utrecht: STW, p. 526-529 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  10. Runtime decision of hardware or software execution on a heterogeneous reconfigurable platform

    Sima, VM. & Bertels, K., 2009, 23rd IEEE international parallel & distributed processing symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  11. Runtime memory allocation in a heterogeneous reconfigurable platform

    Sima, VM. & Bertels, K., 2009, 2009 Intl. conf. on ReConFigurable computing and FPGAs. s.n. (ed.). Piscataway: IEEE Society, p. 71-76 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  12. SIMD architectural enhancements to improve the performance of the 2D discrete wavelet transform

    Shahbahrami, A. & Juurlink, B., 2009, 12th Euromicro conference on digital system design architecturs, methods and tools. s.n. (ed.). s.l.: s.n., p. 497-504 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  13. Scalability of macroblock-level parallelism for H.264 decoding

    Alvarez Mesa, M., Ramirez, A., Pereira de Azevedo Filho, AP., Meenderinck, CH., Juurlink, B. & Valero, M., 2009, 15th International Conference Parallel and distributed systems (ICPADS 2009). Werner et al., B. (ed.). Piscataway, NJ, USA: IEEE Society, p. 236-243 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  14. Scalar processing overhead on SIMD-only architectures

    Pereira de Azevedo Filho, AP. & Juurlink, B., 2009, 20th IEEE international conference on application-specific systems, architectures and processors. n.s. (ed.). Piscataway: IEEE Society, p. 183-190 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  15. Scan more with memory scan test

    Hamdioui, S. & Al-Ars, Z., 2009, 4th IEEE international conference on design & technology of integrated systems in nanoscale era. s.n. (ed.). Piscataway: IEEE Society, p. 204-209 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  16. Smart Power Management for an Onboard Wireless Sensors and Actuators Network

    Amini, R., Gaydadjiev, GN. & Gill, EKA., 2009, Proceedings AIAA Space 2009 Conference en Exposition. s.n (ed.). Pasadena, California: AIAA, p. 1-9 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  17. Specialization of the cell SPE for media applications

    Meenderinck, CH. & Juurlink, B., 2009, 20th IEEE international conference on application-specific systems, architectures and processors. n.s. (ed.). Piscataway: IEEE Society, p. 46-52 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  18. Suspended gate field effect transistor based power management -a 32- bit adder case study

    Enachescu, M., van Genderen, AJ. & Cotofana, SD., 2009, CAS 2009 proceedings. s.n. (ed.). Piscataway: IEEE Society, p. 561-564 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  19. System level runtime mapping exploration of reconfigurable architectures

    Sigdel, K., Thompson, M., Pimentel, AD., Bertels, K. & Galuzzi, C., 2009, 23rd IEEE international parallel & distributed processing symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  20. Task centric memory management for an on-chip multiprocessor

    Molnos, AM., 2009, Delft. 180 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  21. The Delft reconfigurable VLIW processor

    Wong, S. & Anjam, F., 2009, 17th IEEE International Conference on Advanced Computing and Communications. Balakrishnan, N. (ed.). Piscataway, NJ, USA: IEEE Society, p. 244-251 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  22. The Molen organisation and programming paradigm

    Bertels, K., Beemster, M., Sima, VM., Panainte, E. & Schoorel, M., 2009, Dynamic system reconfiguration in heterogeneous platforms- the Morpheus approach. Voros, N., Rosti, A. & Hubner, M. (eds.). New York: Springer, p. 119-128 270 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientific

  23. The TU Delft sudoku solver on FPGA

    Bok van der, K., Taouil, M., Afratis, P. & Sourdis, I., 2009, 2009 intl. conf. on field-programmable technology. Bergmann, N., Diessel, O. & Shannon, L. (eds.). Piscataway: IEEE Society, p. 526-529 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  24. Towards a runtime system for reconfigurable computers: a virtualization approach

    Sabeghi, M. & Bertels, K., 2009, Proceedings design, automation and test in Europa. s.n. (ed.). Piscataway: IEEE Society, p. 1576-1579 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  25. Using RRNS codes for cluster faults tolerance in hybrid memories

    Haron, NZB. & Hamdioui, S., 2009, 2009 IEEE international symposium on defect and fault tolerance in VLSI systems. Gizopoulos, D., Tehranipoor, M. & Tragoudas, S. (eds.). Piscataway: IEEE Society, p. 85-93 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  26. Wave field synthesis for 3D audio: architectural prospectives

    Theodoropoulos, D., Ciobanu, CB. & Kuzmanov, GK., 2009, 2009 ACM international conference on computing frontiers & workshops. n.s. (ed.). New York: Association for Computing Machinery (ACM), p. 127-136 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  27. Worst-case bit line coupling backgrounds for open defects in SRAM cells

    Irobi, IS. & Al-Ars, Z., 2009, 20th annual workshop on circuits, systems and signal processing. s.n. (ed.). Utrecht: STW, p. 25-30 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  28. rSesame - a generic system-level runtime simulation framework for reconfigurable architectures

    Sigdel, K., Thompson, M., Galuzzi, C., Pimentel, AD. & Bertels, K., 2009, 2009 intl. conf. on field-programmable technology. Bergmann, N., Diessel, O. & Shannon, L. (eds.). Piscataway: IEEE Society, p. 460-464 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  29. 2010
  30. 3D compaction: a novel blocking-aware algorithm for online hardware task scheduling and placement on 2D partially reconfigurable devices

    Thomas, TM., Lu, Y., Bertels, K. & Gaydadjiev, GN., 2010, 6th Intl. symp. ARC 2010. Sirisuk, P., Morgan, F., El-Ghazawi, T. & Amano, H. (eds.). Berlijn: Springer, p. 194-206 13 p. (Lecture Notes in Computer Science; vol. 5992).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  31. A 3D-audio reconfigurable processor

    Theodoropoulos, D., Kuzmanov, GK. & Gaydadjiev, GN., 2010, Eighteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. s.n. (ed.). New York: Association for Computing Machinery (ACM), p. 107-110 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  32. A Novel Virtual Age Reliability Model for Time-toFailure Prediction

    Wang, Y. & Cotofana, SD., 2010, IEEE International Integrated Reliability Workshop Final Report. Young, C. & Geilenkeuser, R. (eds.). Piscataway, NJ, USA: IEEE Society, p. 102-105 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  33. A TDM slot allocation flow based on multipath routing in NoCs

    Stefan, RA. & Goossens, KGW., 2010, In : Microprocessors and Microsystems. p. 1-9 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  34. A VLIW softcore processor with dynamically adjustable issue-slots

    Anjam, F., Nadeem, M. & Wong, JSSM., 2010, 2010 intl. conf. on field-programmable technology. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  35. A case for hardware task management support for the StarSS programming

    Meenderinck, CH. & Juurlink, BHH., 2010, 13th Euromicro conf. on digital systems design, architectures, methods and tools. s.n. (ed.). Piscataway: IEEE Society, p. 347-354 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  36. A communication aware online task scheduling algorithm for FPGA-based partially reconfigurable systems

    Lu, Y., Thomas, TM., Bertels, K. & Gaydadjiev, GN., 2010, 18th IEEE Field-programmable custom computing machines. Sass, R. & Tessier, R. (eds.). Los Alamitos, CA: IEEE Society, p. 65-68 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  37. A composable, energy-managed, realtimeMPSOC platform

    Goossens, KGW., Molnos, AM., Ambrose, JA., Nelson, AT., Stefan, RA. & Cotofana, SD., 2010, 12th Intl. optimization electrical and electronic equipment. s.n. (ed.). s.l.: IEEE Society, p. 870-876 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  38. A library of dual-clock FIFOs for cost-effective and flexible MPSoCs design

    Strano, A., Ludovici, D. & Bertozzi, D., 2010, 2010 Intl. conf. on embedded computer systems: architectures, modeling and simulation. s.n. (ed.). Piscataway: IEEE Society, p. 20-27 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  39. A minimalistic for reconfigurable WFS-based immersive-audio

    Theodoropoulos, D., Kuzmanov, GK. & Gaydadjiev, GN., 2010, 2010 Intl. conf. on reconfigurable computing. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  40. A modified merging approach for datapath configuration time reduction

    Fazlali, M., 2010, Reconfigurable computing: architectures, tools and applications. Sirisuk, P., Morgan, F., El-Ghazawi, T. & Amano, H. (eds.). Berlijn: Springer, p. 318-328 11 p. (Lecture Notes in Computer Science; vol. 5992).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  41. A multidimensional software cache for scratchpad-based systems

    Pereira de Azevedo Filho, AP. & Juurlink, BHH., 2010, In : International Journal of Embedded and Real-Time Communication Systems. 1, 4, p. 1-20 20 p.

    Research output: Contribution to journalArticleScientificpeer-review

  42. A multiported register file with register renaming for configurable softcore VLIW processors

    Anjam, F., Wong, JSSM. & Nadeem, MF., 2010, 2010 Intl. conf. on field programmable technology. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  43. A novel HDL coding style to reduce power consumption for reconfigurable devices

    Thomas, TM., Theodoropoulos, D., Bertels, KLM. & Gaydadjiev, GN., 2010, Proc. 2010 Intl. conf. on field-programmable technology. s.n. (ed.). Piscataway: IEEE Society, p. 295-299 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  44. A novel configuration circuit architecture to speedup reconfiguration and relocation for partially reconfigurable devices

    Thomas, TM., Hur, JY., Bertels, K. & Gaydadjiev, GN., 2010, 2010 IEEE 8th symp. on application specific processors. s.n. (ed.). CA, USA: IEEE Society, p. 105-110 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  45. A parallel FPGA design of the Smith-waterman traceback

    Nawaz, Z., Nadeem, M., van Someren, J. & Bertels, KLM., 2010, Proc. 2010 Intl. conf. on field-programmable technology. s.n. (ed.). Piscataway: IEEE Society, p. 454-459 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  46. A polymorphic register file for matrix operations

    Ciobanu, CB., Kuzmanov, GK., Gaydadjiev, GN. & Ramirez, A., 2010, 2010 Intl. conf. on embedded computer systems: architectures, modeling and simulation. s.n. (ed.). Piscataway: IEEE Society, p. 241-249 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  47. A shared reconfigurable VLIW multiprocessor system

    Anjam, F., Wong, S. & Nadeem, MF., 2010, IPDPS 2010 conf. 24th IEEE intl. parallel and distributed processing symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  48. A unified addition structure for moduli set 2n-1, 2n, 2n+1 based on a novel RNS representation

    Timarchi, S., Fazlali, M. & Cotofana, SD., 2010, ICCD 2010. s.n. (ed.). Piscataway: IEEE Society, p. 247-252 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  49. Advanced NEMS-based power management for 3D stacked integrated circuits

    Enachescu, M., Voicu, GR. & Cotofana, SD., 2010, 2010 Intl. conf. on energy aware computing. s.n. (ed.). Piscataway: IEEE Society, p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  50. An attitude determination system suitable for a spacecraft

    Amini, R., Gill, EKA. & Gaydadjiev, GN., 2010, IPC No. aanvrager: TU Delft, Patent No. NL48.293-VB, Priority date 1 Jan 1800

    Research output: PatentOther research output

  51. An efficient FPGA design of reverse converter for the moduli set {2n+2, 2n+1, 2n}

    Gbolagade, KA., Voicu, GR. & Cotofana, SD., 2010, Advanced computer architecture and compilation for high-performance and embedded systems. s.n. (ed.). s.l.: s.n., p. 117-120 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  52. An efficient realization of forward integer transform in H.264/AVC intra-frame encoder

    Nadeem, M., Wong, S. & Kuzmanov, GK., 2010, 2010 Intl. conf. on embedded computer systems: architectures, modeling and simulation. s.n. (ed.). Piscataway: IEEE Society, p. 71-78 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  53. An improved RNS reverse converter for the {2 2n+1-1, 2n, 2n-1} moduli set

    Gbolagade, KA., Chaves Fernandes, R., Sousa, L. & Cotofana, SD., 2010, IEEE intl. symposium on circuits and systems. Piscataway: IEEE Society, p. 2103-2106 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  54. Badwidth analysis of functional interconnects used as test access mechanism

    van den Berg, A., Ren, P., Marinissen, E., Gaydadjiev, GN. & Goossens, KGW., 2010, In : Journal of Electronic Testing: theory and applications. 26, 4, p. 453-464 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  55. Bit line coupling memory tests for single cell fails in SRAMs

    Irobi, IS., Al-Ars, Z. & Hamdioui, S., 2010, 28th IEEE VLSI test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  56. Buffered crossbar fabrics based on network on chip

    Mhamdi, LL., Goossens, KGW. & Varela Senin, I., 2010, 8th annual communication networks and services research conference. s.n. (ed.). Piscataway: IEEE Society, p. 74-79 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  57. Collaboration of reconfigurable processors in grid computing for multimedia kernels

    Ahmadi, M., Shahbahrami, A. & Wong, JSSM., 2010, Grid and Pervasive Computing 2010. s.n. (ed.). Berlijn: Springer, p. 5-14 10 p. (Lecture Notes in Computer Science; vol. 6104/2010).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  58. Composable dynamic voltage and frequency scaling and power management for dataflow applications

    Goossens, KGW., She, D., Milutinovic, A. & Molnos, AM., 2010, 13th euromicro conf. on digital system design. s.n. (ed.). Piscataway: IEEE Society, p. 107-114 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  59. Composable processor virtualization for embedded systems

    Molnos, AM., Milutinovic, A., She, D. & Goossens, KGW., 2010, 1st workshop on Computer Architecture and operating system co-design. s.n. (ed.). s.l.: s.n., p. 1-10 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  60. Conservative application-level performance analysis through simulation of MPSoCs

    Nelson, AT., Hansson, A., Corporaal, H. & Goossens, KGW., 2010, 7th workshop on embedded systems for real-time multimedia. s.n. (ed.). Piscataway: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  61. Contrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology

    Ludovici, D., Gilabert, F., Gaydadjiev, GN. & Bertozzi, D., 2010, 3rd Intl. workshop on network on chip architectures. s.n. (ed.). Piscataway: IEEE Society, p. 37-42 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  62. Data structure, method and system for address lookup

    Sourdis, I., Smet de, R., Stefanakis, G. & Gaydadjiev, GN., 2010, Patent No. NL 2002799, Priority date 26 Oct 2010

    Research output: PatentOther research output

  63. Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCs

    Ludovici, D., Strano, A., Gaydadjiev, GN., Benini, L. & Bertozzi, D., 2010, Design, automation & test in Europe. s.n. (ed.). s.l.: s.n., p. 679-684 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  64. Detecting memory faults in the presence of bit line coupling in SRAM devices

    Irobi, IS., Al-Ars, Z. & Hamdioui, S., 2010, Intl. test conference 2010. s.n. (ed.). Piscataway: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  65. Digital analysis of papers for the authentication and dating of art

    Pourebrahimi, B., Van Der Lubbe, J. C. A. & Dietz, G., 2010, Proceedings of the 12th IASTED International Conference on Signal and Image Processing, SIP 2010. p. 93-100 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  66. Dynamic profiling framework in the Delft workbench

    Ostadzadeh, SA. & Bertels, KLM., 2010.

    Research output: Contribution to conferencePosterScientific

  67. Dynamically reconfigurable register file for a softcore VLIW processor

    Wong, JSSM., Anjam, F. & Nadeem, MF., 2010, Design, automation & test in Europe. s.n. (ed.). s.l.: s.n., p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  68. ECC design for fault-tolerant crossbar memories: a case study

    Haron, NZB., Hamdioui, S. & Ahyadi, Z., 2010, 5th Intl. design and test workshop. Elahi, I., Ivanov, A., Zorian, Y. & Salem, A. (eds.). Piscataway: IEEE Society, p. 61-666 606 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  69. Effect of the degree of neighborhood on resource discovery in ad hoc grids

    Abdullah, MT., Bertels, K., Alima, LO. & Nawaz, Z., 2010, 23rd Intl. conf. ARCS 2010. Muller-Schloer, C., Karl, W. & Yehia, S. (eds.). Heidelberg: Springer, p. 174-186 13 p. (Lecture Notes in Computer Science; vol. 5974).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  70. Effective reverse conversion in residue number system processors

    Gbolagade, KA., 2010, Delft. 160 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  71. Efficient datapath merging for the overhead reduction of run-time reconfigurable systems

    Fazlali, M., Zakerolhosseini, A. & Gaydadjiev, GN., 2010, In : Journal of Supercomputing: an international journal of high-performance computer design, analysis and use. 52, 3

    Research output: Contribution to journalArticleScientificpeer-review

  72. Efficient hardware task reuse and interrupt handling for FPGA-based partially reconfigurable systems

    Lu, Y., Gaydadjiev, GN. & Bertels, KLM., 2010, Proc. 2010 Intl. conf. on field-programmable technology. s.n. (ed.). Piscataway: IEEE Society, p. 324-327 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  73. Efficient task scheduling for runtime reconfigurable systems

    Fazlali, M., Sabeghi, M., Zakerolhosseini, A. & Bertels, KLM., 2010, In : Journal of Systems Architecture. 56, 11, p. 623-632 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  74. Evaluation of parallel H.264 decoding strategies for the cell broadband engine

    Chi, C., Juurlink, B. & Meenderinck, CH., 2010, 2010 Intl. conference on supercomputing. s.n. (ed.). New York: Association for Computing Machinery (ACM), p. 105-114 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  75. Evaluation of runtime task mapping heuristics with rSesame - a case study

    Sigdel, K., Thompson, M., Galuzzi, C., Pimentel, A. & Bertels, K., 2010, Design, automation & test in Europe. s.n. (ed.). s.l.: s.n., p. 831-836 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  76. Extending the cell SPE with energy efficient branch prediction

    Briejer, M., Meenderinck, CH. & Juurlink, BHH., 2010, 16th intl. Euro-Par conf.. D'Ambra, P., Guarracino, M. & Talia, D. (eds.). Berlijn: Springer, p. 304-315 12 p. (Lecture Notes in Computer Science; vol. 6271).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  77. Fast smith-waterman hardware implementation

    Nawaz, Z., Bertels, KLM. & Sümbül, HE., 2010, IPDPS 2010 Conference 24th Intl. Parallel and Distributed processing symposium. s.n. (ed.). Piacataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  78. Fine-grain fault diagnosis for FPGA logic blocks

    Tzilis, S., Sourdis, I. & Gaydadjiev, GN., 2010, Proc. 2010 Intl. conf. on field-programmable technology. s.n. (ed.). Piscataway: IEEE Society, p. 154-161 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  79. General purpose computing with reconfigurable acceleration

    Brandon, AAC., Sourdis, I. & Gaydadjiev, GN., 2010, 2010 intl. conf on field programmable logic and applications. s.n. (ed.). Piscataway: IEEE Society, p. 588-591 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  80. Growing on the inside: soulful characters for video games

    Bidarra, AR., Schaap, R. & Goossens, KGW., 2010, Proceedings of IEEE Conference on Computational Intelligence and Games. s.n. (ed.). Los Alamitos, CA, USA: IEEE Society, p. 337-344 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  81. HArtes: hardware-software codesign for heterogeneous multicore platforms

    Bertels, KLM., Sima, VM., Yankova, YD. & Kuzmanov, GK., 2010, In : IEEE Micro. 30, 5, p. 88-97 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  82. Hand segmentation by fusing 2D and 3D data

    Hassanpour, R., Shahbahrami, A. & Wong, S., 2010, Intl conf. on Computer modeling and simulation. s.n. (ed.). Los Alamitos, CA: IEEE Society, p. 99-103 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  83. High performance and resource efficient biological sequence alignment

    Hasan, L., Al-Ars, Z. & Taouil, M., 2010, IEEE EMB. s.n. (ed.). s.n., p. 1767-1770 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  84. High-performance cluster-fault tolerance scheme for hybrid nanoelectronic memories

    Haron, NZB. & Hamdioui, S., 2010, 2010 IEEEIntl. symp. on defect and fault tolerance in VLSI systems. s.n. (ed.). Piscataway: IEEE Society, p. 144-151 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  85. High-performance processing in networked and grid environments

    Ahmadi, M., 2010, Delft. 131 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  86. Identifying optimal generic processors for biomedical implants

    Strydis, C. & Dave, D., 2010, 2010 IEEE intl. conf. on computer design. s.n. (ed.). Piscataway: IEEE Society, p. 494-501 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  87. ImpBench revisited: an extended characterization of implant-processor benchmarks

    Strydis, C., Dave, D. & Gaydadjiev, GN., 2010, 2010 Intl. conf. on embedded computer systems: architectures, modeling and simulation. s.n. (ed.). Piscataway: IEEE Society, p. 126-135 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  88. ImpEDE: a multidimesional design-space exploration framework for biomedical-implant processors

    Dave, D., Strydis, C. & Gaydadjiev, GN., 2010, 21st IEEE conf. on application-specific systems, architectures and processors. s.n. (ed.). Piscataway: IEEE Society, p. 39-46 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  89. Impact of process variations on the throughput of real-time applications in multiprocessor systems-on-chip

    Mirzoyan, D., Akesson, B. & Goossens, KGW., 2010.

    Research output: Contribution to conferencePosterScientific

  90. Impact of various test flows on the cost in 3D die-to-wafer stacking

    Taouil, M., Hamdioui, S. & Marinissen, E., 2010, Proceedings Intl. test conference 2010. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  91. Improving the scalability of multicore systems with a focus on H.264 video decoding

    Meenderinck, CH., 2010, Delft. 236 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  92. Instruction precomputation with memoization for fault detection

    Borodin, D. & Juurlink, B., 2010, Design, automation & test in Europe. s.n. (ed.). s.l.: s.n., p. 1665-1668 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  93. Interfacing operating systems and polymorhic computing platforms based on the MOLEN programming paradigm

    Sabeghi, M. & Bertels, K., 2010, 6th annual workshop on the interaction between operating systems and computer architecture. s.n. (ed.). s.l.: s.n., p. 30-35 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  94. Low-cost, customized and flexible SRAM MBIST engine

    van de Goor, AJ., Jung, C., Hamdioui, S. & Gaydadjiev, GN., 2010, IEEE Intl. symposium on design and diagnostics of electronic circuits and systems. s.n. (ed.). Piscataway: IEEE Society, p. 382-387 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  95. Low-power, high-throughput deblocking filter for H.264/AVC

    Nadeem, M., Wong, JSSM., Kuzmanov, GK., Shabbir, A., Nadeem, MF. & Anjam, F., 2010, 2010 intl. symposium on system-on-chip. s.n. (ed.). Piscataway: IEEE Society, p. 93-98 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  96. MBIST architecture framework based on orthogonal constructs

    van de Goor, AJ. & Hamdioui, S., 2010, 5th Intl. design and test workshop. Ivanov, A., Elahi, I., Zorian, Y. & Salem, A. (eds.). Piscataway: IEEE Society, p. 128-133 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  97. Mechanisms for self-organizing ad hoc grids

    Abdullah, MT., 2010, Delft. 155 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  98. Memory and storage management

    Campos Soares Borrego, F. & Wong, JSSM., 2010, In : IEEE Transactions on Computers. 59, 11, p. 1494-1507 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  99. Memory testing with a RISC microcontroller

    van de Goor, AJ., Gaydadjiev, GN. & Hamdioui, S., 2010, Design, automation & test in Europe 2010. s.n. (ed.). Piscataway: IEEE Society, p. 214-219 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  100. Memoryless RNS-to-binary converters for the {2n+1-1, 2n, 2n-1} moduli set

    Gbolagade, KA., Voicu, GR. & Cotofana, SD., 2010, 21st IEEE intl. conf. on Application-specific systems, architectures and processors. Charot, F., Hanig, F., Teich, J. & Wolinski, C. (eds.). Piscataway: IEEE Society, p. 301-304 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  101. Minimalistic architecture for reconfigurable audio beamforming

    Theodoropoulos, D., Kuzmanov, GK. & Gaydadjiev, GN., 2010, Proc. 2010 Intl. conf. on field-programmable technology. s.n. (ed.). Piscataway: IEEE Society, p. 503-506 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  102. Mirror routing for satellite networks with cross-layer optimization

    Chang, Z. & Gaydadjiev, GN., 2010, 2nd Intl. conf. WiMo 2010. Özcan, A., Chaki, N. & Nagamalai, D. (eds.). Berlijn: Springer, p. 177-189 13 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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