1. ¿MOS enhanced differential current-switch threshold logic gates

    Li, KC., Padure, MD. & Cotofana, SD., 2005, Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing. s.n. (ed.). Utrecht: Dutch Technology Foundation, p. 530-535 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  2. using VLIW softcore processors for image processing applications

    Hoozemans, JJ., Wong, S. & Al-Ars, Z., 2015, Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS XV. Soudris, D. & Carro, L. (eds.). Piscataway: IEEE Society, p. 315-318 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  3. tQUAD-memory bandwith usage analysis

    Ostadzadeh, SA., Corina, M., Galuzzi, C. & Bertels, KLM., 2010, 39th intl. conf. on parallel processing workshops. s.n. (ed.). Piscataway: IEEE Society, p. 217-226 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  4. rSesame - a generic system-level runtime simulation framework for reconfigurable architectures

    Sigdel, K., Thompson, M., Galuzzi, C., Pimentel, AD. & Bertels, K., 2009, 2009 intl. conf. on field-programmable technology. Bergmann, N., Diessel, O. & Shannon, L. (eds.). Piscataway: IEEE Society, p. 460-464 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  5. pi-VEX: a reconfigurable and extensible softcore VLIW processor

    Wong, S., As van, T. & Brown, G., 2008, 2008 International conference on field-programmable technology. s.n. (ed.). Piscataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  6. hArtes: Holistic Approach to Reconfigurable Real-Time Embedded Systems

    Kuzmanov, GK., Sima, VM., Bertels, KLM., Coutinho, G., Luk, W., Marchiori, G., Tripiccione, R. & Ferrandi, F., 2011, Reconfigurable Computing - From FPGAs to Hardware/Software Codesign. Cardoso, JMP. & Hübner, M. (eds.). Berlin - Heidelberg: Springer, p. 91-116 290 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientific

  7. eQASM: An executable quantum instruction set architecture

    Fu, X., Riesebos, L., Rol, M. A., Van Straten, J., Van Someren, J., Khammassi, N., Ashraf, I., Vermeulen, R. F. L., Newsum, V., Loh, K. K. L., De Sterke, J. C., Vlothuizen, W. J., Schouten, R. N., García Almudever, C., Dicarlo, L. & Bertels, K., 2019, Proceedings - 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019. Louri, A. & Venkataramani, G. P. (eds.). Piscataway, NJ: IEEE, p. 224-237 14 p. 8675197

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  8. Zero-performance-overhead online fault detection and diagnosis in 3D stacked integrated circuits

    Safiruddin, S., Lefter, M., Borodin, DV., Voicu, GR. & Cotofana, SD., 2012, ACM International symposium on nanoscale architectures. s.n. (ed.). New York: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  9. You can catch more bugs with transaction level honey

    Abramovici, MM., Goossens, KGW., Greenbaum, J., Stollon, N. & Donlin, A., 2008, International Conference on Hardware/Software Codesign and System Synthesis. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 121-124 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  10. Yield improvement for 3D wafer-to-wafer stacked memories

    Taouil, M. & Hamdioui, S., 2012, In : Journal of Electronic Testing: theory and applications. 28, 4, p. 523-534 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  11. Yield improvement and test cost optimization for 3D stacked ICs

    Hamdioui, S. & Taouil, M., 2011, 20th IEEE Asian Test Symposium 2011. Chatterjee, A., Patra, A., Kundu, S. & Ravi, S. (eds.). Piscataway, NJ, USA: IEEE Society, p. 480-485 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  12. Yield and cost analysis or 3D stacked ICs

    Taouil, M., 2014, 215 p.

    Research output: ThesisDissertation (TU Delft)

  13. Yield Improvement for 3D wafer-to-wafer stacked ICs using wafer matching

    Taouil, M., Hamdioui, S. & Marinissen, EJ., 2015, In : ACM Transactions on Design Automation of Electronic Systems. 20, 2, p. 1-23 23 p.

    Research output: Contribution to journalArticleScientificpeer-review

  14. Y'UV-to-R'G'B' color space conversion on FPGA-augmented TriMedia-32 processor

    Sima, M., Vassiliadis, S., van Eijndhoven, JTJ. & Cotofana, SD., 2002, Proceeding ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 465-471 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  15. Wrapper design for the reuse of networks-on-chip as test access mechanism

    Amory, A., Goossens, KGW. & Marinissen, E., 2006, Proc. European Test Symposium. s.n. (ed.). Piscataway: IEEE Society, p. 213-218 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  16. Wrapper design for the reuse of a bus, network-on-chip, or other functional interconnects at test access mechanism

    Amory, A., Goossens, KGW., Marinissen, E., Lubaszewski, M. & Moraes, F., 2007, In : IET Computers and Digital Techniques. 1, 3, p. 197-206 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  17. Worst-case bit line coupling backgrounds for open defects in SRAM cells

    Irobi, IS. & Al-Ars, Z., 2009, 20th annual workshop on circuits, systems and signal processing. s.n. (ed.). Utrecht: STW, p. 25-30 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  18. Wireless SDR solutions: The challenge and promise of next generation handsets

    Glossner, CJ., Hokenek, E. & Moudgill, M., 2002, CDC 2002 Communications Design Conference Proceedings. CMP Media LLC, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  19. Why is CMOS scaling coming to an END?

    Haron, NZB. & Hamdioui, S., 2008, 2008 Third international design and test workshop. Abid, M., Loulou, M., Salem, A., Zorian, Y. & Ivanov, A. (eds.). Piscataway: IEEE Society, p. 98-103 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  20. Weighted embedded zero tree for scalable vidoe compression

    Choupani, R., Wong, S. & Tolun, MR., 2008, Proceedings of the 2008 international conference on image processing, computer vision, & pattern recognition. Arabnia, HR. (ed.). USA: CSREA Press, p. 681-684 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  21. Weighted embedded zero tree for scalable video compression

    Choupani, R., Wong, S. & Tolun, MR., 2008, Intl. Conf. on Image Processing, Computer Vission and Pattern Recognition. s.n. (ed.). s.l.: s.n., p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  22. Wave field synthesis for 3D audio: architectural prospectives

    Theodoropoulos, D., Ciobanu, CB. & Kuzmanov, GK., 2009, 2009 ACM international conference on computing frontiers & workshops. n.s. (ed.). New York: Association for Computing Machinery (ACM), p. 127-136 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  23. Voltage References for the Ultra-Wide Temperature Range from 4.2K to 300K in 40-nm CMOS

    Van Staveren, J., Garcia Almudever, C., Scappucci, G., Veldhorst, M., Babaie, M., Charbon, E. & Sebastiano, F., 1 Sep 2019, ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference. Institute of Electrical and Electronics Engineers (IEEE), p. 37-40 4 p. 8902861

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  24. Visual data rectangular memory

    Kuzmanov, GK., Gaydadjiev, GN. & Vassiliadis, S., 2004, Euro-Par 2004 Parallel processing. Danelutto, M., Vanneschi, M. & Laforenza, D. (eds.). Berlin: Springer, p. 760-767 8 p. (Lecture Notes in Computer Science; vol. 3149).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  25. Vision-based hand gesture recognition for human computer interaction: a review

    Hassanpour, R., Wong, S. & Shahbahrami, A., 2008, IADIS Multi Conference on Computer Science and Information Systems. Blashki, K. (ed.). s.l.: IADIS Press, p. 125-132 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  26. Virtual execution platforms for mixed-time-criticality systems: The CompSOC architecture and design flow

    Goossens, KGW., Pereira de Azevedo Filho, AP., Chandrasekar, K., Mirzoyan, D., Molnos, AM., Beyranvand Nejad, A. & Nelson, AT., 2013, In : SIGBED Review. 10, 3, p. 23-34 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  27. Versatility of extended subwords and the matrix register file

    Shahbahrami, A., Juurlink, B. & Vassiliadis, S., 2008, In : ACM Transactions on Architecture and Code Optimization. 5, 1, p. 1-29 29 p.

    Research output: Contribution to journalArticleScientificpeer-review

  28. Vectorized aes core for high-throughput secure environments

    Pericas, M., Chaves, PC., Gaydadjiev, GN. & Vassiliadis, S., 2007, The future of computing. Gaydadjiev, G Bertels, K, C. S. & Genderen van, A Hamdioui, S, J. B. (eds.). Delft: Computer Engineering TUDelft, p. 91-100 143 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientificpeer-review

  29. Vectorized AES core for high-throughput secure environments

    Pericas, M., Chaves Fernandes, R., Gaydadjiev, GN., Vassiliadis, S. & Valero, M., 2008, In : Lecture Notes in Computer Science. 5336, p. 83-94 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  30. Vector Processor Customization for FFT

    Spinean, B., Kuzmanov, GK. & Gaydadjiev, GN., 2011, International Conference on Embedded Computer Systems: Architecture Modeling and Simulation. Carro, L. & Pimentel, A. (eds.). Piscataway: IEEE Society, p. 110-117 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  31. Vector ISA extension for sparse matrix-vector multiplication

    Vassiliadis, S., Cotofana, SD. & Stathis, P., 1999, Euro-Par '99 Parallel Processing: proceedings (Lecture notes in computer science 1685). P Amestoy (ed.). Berlin: Springer, p. 708-715 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  32. Variation tolerant on-chip degradation sensors for dynamic reliability management systems

    Wang, Y., Enachescu, M., Cotofana, SD. & Fang, L., 2012, In : Microelectronics Reliability. 52, 9-10, p. 1-6 6 p.

    Research output: Contribution to journalArticleScientificpeer-review

  33. Variable length decoder implemented on a TriMedia/CPU64 reconfigurable functional unit

    Sima, M., Cotofana, SD., Vassiliadis, S. & van Eijndhoven, JTJ., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 605-610 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  34. Variability and reliability analyses in SRAM decoder

    Seyab, MSK. & Hamdioui, S., 2013, 4th Workshop on design for reliability. s.n. (ed.). s.l.: s.n., p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  35. VLSI layout and packaging of butterfly networks

    Yeh, CH., Parhami, B., Varvarigos, EA. & Lee, H., 2000, SPAA 2000. New York: Association for Computing Machinery (ACM), p. 196-205 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  36. VLIW-Based FPGA Computation Fabric with Streaming Memory Hierarchy for Medical Imaging Applications

    Hoozemans, J., Heij, R., van Straten, J. & Al-Ars, Z., 2017, Applied Reconfigurable Computing: 13th International Symposium, ARC 2017. Wong, S., Beck, A. C., Bertels, K. & Carro, L. (eds.). Cham: Springer, p. 36-43 8 p. (Lecture Notes in Computer Science; vol. 10216)(Theoretical Computer Science and General Issues; vol. 10216).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  37. VASILE: a reconfigurable vector architecture for instruction level frequency scaling

    Petrica, L., Codreanu, V. & Cotofana, SD., 2013, 12th IEEE low voltage low power conference. s.n. (ed.). Piscataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  38. Using wavelet transform self-similarity for effective multiple description video coding

    Choupani, R., Wong, S. & Tolun, M., 2016, 10th International Conference on Information, Communications and Signal Processing, ICICS 2015. Piscataway, NJ: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  39. Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures

    Mariani, GS., Sima, VM., Palermo, G., Zaccaria, V., Silvano, C. & Bertels, KLM., 2012, Design, automation & test in Europe conference & exhibition. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  40. Using linear tests for transient faults in DRAMs

    Al-Ars, Z., Hamdioui, S. & Gaydadjiev, GN., 2006, International Design and Test workshop. s.n. (ed.). Piscataway: IEEE Society, p. -

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  41. Using a Polymorphic VLIW Processor to Improve Schedulability and Performance for Mixed-criticality Systems

    Hoozemans, J., van Straten, J. & Wong, S., Aug 2017, 2017 IEEE 23rd International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA). Danvers: IEEE, p. 1-9 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  42. Using a CISC microcontroller to test embedded memories

    van de Goor, AJ., Hamdioui, S. & Gaydadjiev, GN., 2010, IEEE intl. symposium on design and diagnostics of electronic circuits and systems. s.n. (ed.). Piscataway: IEEE Society, p. 382-387 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  43. Using Transition Fault Test Patterns for Cost Effective Offline Performance Estimation

    Zandrahimi, M., Debaud, P., Castillejo, A. & Al-Ars, Z., 2017, 2017 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS). Danvers: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  44. Using RRNS codes for cluster faults tolerance in hybrid memories

    Haron, NZB. & Hamdioui, S., 2009, 2009 IEEE international symposium on defect and fault tolerance in VLSI systems. Gizopoulos, D., Tehranipoor, M. & Tragoudas, S. (eds.). Piscataway: IEEE Society, p. 85-93 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  45. Using 3D-COSTAR for 2.5D test cost optimization

    Taouil, M., Hamdioui, S., Marinissen, EJ. & Bhawmik, S., 2013, IEEE International 3D Systems Integration Conference. s.n. (ed.). Piscataway: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  46. Untestable faults identification in GPGPUs for safety-critical applications

    Condia, J. E. R., Da Silva, F. A., Hamdioui, S., Sauer, C. & Reorda, M. S., 2019, 2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019. Institute of Electrical and Electronics Engineers (IEEE), p. 570-573 4 p. 8964677

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  47. Unstructured agent matchmaking: experiments in timing and fuzzy matching

    Ogston, EFYL. & Vassiliadis, S., 2002, Applied computing 2002: Proceedings of the 2002 ACM symposium on applied computing. New York: Association for Computing Machinery (ACM), p. 300-306 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  48. Universal Processor Architecture for Biomedical Implants: The SiMS Project

    Strydis, C., 2011, 315 p.

    Research output: ThesisDissertation (TU Delft)

  49. Unified dual data caches

    Juurlink, BHH., 2003, DSD 2003; euromicro symposium on digital system design, architectures, methodes and tools. s.n. (ed.). Piscataway: IEEE Society, p. 33-41 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  50. Undisrupted quality-of-service during reconfiguration on multiple applications in networks on chip

    Hansson, A., Coenen, M. & Goossens, KGW., 2007, Design, Automation & Test in Europe. s.n. (ed.). s.l.: EDAA, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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