601 - 700 out of 1,593Page size: 100
  1. Conference contribution › Scientific › Peer-reviewed
  2. An experimental microarchitecture for a superconducting qantum processor

    Fu, X., Rol, M. A., Bultink, C. C., Van Someren, J., Khammassi, N., Ashraf, I., Vermeulen, R. F. L., De Sterke, J. C., Vlothuizen, W. J., Schouten, R. N., García Almudever, C., DiCarlo, L. & Bertels, K., 14 Oct 2017, MICRO 2017 - 50th Annual IEEE/ACM International Symposium on Microarchitecture Proceedings. IEEE, Vol. Part F131207. p. 813-825 13 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  3. An implementation of the MPEG-4 ACQ function

    Kuzmanov, G., Vassiliadis, S. & van Eijndhoven, JTJ., 2001, ProRICS 2001: proceedings. Utrecht: STW Technology Foundation, p. 466-469 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  4. An improved RNS reverse converter for the {2 2n+1-1, 2n, 2n-1} moduli set

    Gbolagade, KA., Chaves Fernandes, R., Sousa, L. & Cotofana, SD., 2010, IEEE intl. symposium on circuits and systems. Piscataway: IEEE Society, p. 2103-2106 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  5. An improved algorithm for slot selection in the Æthereal Network-on-Chip

    Stefan, RA. & Goossens, KGW., 2011, Proceedings of the Fifth ACM Interconnection Network Architecture, On-Chip Multi-Chip Workshop (INA-OCMC). Flich, J., Bertozzi, D., Skei, T. & Ludovici, D. (eds.). New York, NY, USA: Association for Computing Machinery (ACM), p. 7-10 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  6. An improved system approach towards future cochlear implants

    Lawand, NS., Ngamkham, W., Nazarian, G., French, PJ., Serdijn, WA., Gaydadjiev, GN., Briaire, JJ. & Frijns, JHM., 2013, Proceedings - 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society in conjuction with the 52nd Annual Conference of Japanese Society for Medical and Biological Engineering (JSMBE). Wheeler, B. (ed.). Piscataway, NJ, USA: IEEE Society, p. 5163-5166 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  7. An investigation into multicasting

    Manolov, N., Gamil, A. & Wong, JSSM., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 523-528 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  8. An o(n) residue number system to mixed radix conversion technique

    Gbolagade, KA. & Cotofana, SD., 2009, 2009 IEEE international symposium on circuits and systems. Piscataway: IEEE Society, p. 521-525 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  9. An on-chip interconnect and protocol stack for multiple communication paradigms and programming models

    Hansson, A. & Goossens, KGW., 2009, 7th IEEE/ACM intl. conf. on hardware/software codesign and system synthesis. s.n. (ed.). New York: Association for Computing Machinery (ACM), p. 99-108 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  10. An optimization framework for retargetable compilers

    Panainte, E., Athanasiu, I. & Cotofana, SD., 2001, CSCS-13: proceedings. I Dumitrache & C Buiu (eds.). Bucharest: Editura Politehnica, p. 427-432 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  11. Analog television, WiMAX and DVB-H on the same SoC platform

    Iancu, D., Ye, H., Kotlyar, V., Senthilvelan, M., Glossner, CJ., Nacer, G., Iancu, A. & Takala, J., 2006, 2006 International Symposium on System-on-Chip. s.n. (ed.). Piscataway: IEEE Society, p. 28-31 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  12. Analyses of video filtering on the cell processor

    Pereira de Azevedo Filho, AP., Meenderinck, CH., Juurlink, B., Alvarez, M. & Ramirez, A., 2008, 2008 IEEE International Symposium on Circuits and Systems. s.n. (ed.). s.l., p. 488-491 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  13. Analysis of a reconfigurable network processor

    Kachris, C. & Vassiliadis, S., 2006, Proceedings of the 20th IEEE International Parallel & Distributed Processing Symposium. s.n. (ed.). Piscataway: IEEE Society, p. 192-192

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  14. Analysis of a user-space device-driver for the memcpy hardware

    Campos Soares Borrego, F. & Wong, S., 2007, Annual Workshop on Circuits, Systems and Signal Processing. s.n. (ed.). utrecht: STW, p. 138-143 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  15. Analysis of analog to digital converter based on single-electron tunneling transistors

    Hu, C., Cotofana, SD. & Jiang, J., 2004, Proceedings of 2004 IEEE international symposium on circuits and systems. Los Alamitos: IEEE, p. 693-696 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  16. Analysis of delay mismatching of digital circuits caused by common environmental fluctuations

    Andrade, D., Rubio, A., Calomarde, A. & Cotofana, SD., 2011, Proceedings 2011 IEEE International Symposium on Circuits and Systems. Silva, EAB. & Lande, TS. (eds.). Piscataway, NJ, USA: IEEE Society, p. 2585-2588 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  17. Analysis of video filtering on the cell processor

    Pereira de Azevedo Filho, AP., Meenderinck, CH. & Juurlink, B., 2007, Annual Workshop on Circuits, Systems and Signal Processing. s.n. (ed.). utrecht: STW, p. 116-121 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  18. Analyzing combined impacts of parameter variations and BTI in nano-scale logical gates

    Seyab, MSK. & Hamdioui, S., 2012, 1st Workshop on manufacturable and dependable multicore architectures at nanoscale. s.n. (ed.). s.l.: s.n., p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  19. Analyzing scalability of deblocking filter of H.264 via TLP exploitation in a new many-core architecture

    Giorgi, R., Popovic, Z., Puzovic, N., Pereira de Azevedo Filho, AP. & Juurlink, B., 2008, 11th Euromicro Conference on Digital System Design, Architectures, Methods and tools. Fanucci, L. (ed.). s.n., p. 189-194 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  20. Analyzing the impact of process variations on DRAM testing using border resistance traces

    Al-Ars, Z. & van de Goor, AJ., 2003, ATS 2003; proceedings of the twelfth Asian test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 24-27 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  21. Applications of Computation-In-Memory Architectures based on Memristive Devices

    Hamdioui, S., Du Nguyen, H. A., Taouil, M., Sebastian, A., Le Gallo, M., Pande, S., Schaafsma, S., Catthoor, F., Das, S., G. Redondo, F., Karunaratne, G., Rahimi, A. & Benini, L., 2019, Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019: Proceedings. IEEE, p. 486-491 6 p. 8715020

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  22. Applying dataflow analysis to dimension buffers for guaranteed performance in networks on chip

    Hansson, A., Wiggers, M., Moonen, A., Goossens, KGW. & Bekooij, M., 2008, Second ACM/IEEE International Symposium on Networks-on- Chip. s.n. (ed.). Piscataway: EEE, p. 211-212 2 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  23. Approximating infinite dynamic behavior for DRAM cell defects

    Al-Ars, Z. & van de Goor, AJ., 2002, 20th VLSI Test symposium Proceedings. Piscataway, NJ, USA: IEEE Society, p. 401-407 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  24. Approximating the optimal replacement algorithm

    Juurlink, BHH., 2004, 2004 Computing Frontier Conference. New York: Association for Computing Machinery (ACM), p. 313-319 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  25. Arbitrating instructions in an ¿¿-coded CCM

    Kuzmanov, GK. & Vassiliadis, S., 2003, Field-programmable logic and applications; 13th international conference, FPL 2003. Cheung, PYK., Constantinides, GA. & de Sousa, JT. (eds.). Berlin: Springer, p. 81-90 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  26. Architectural Support for Multithreading on Reconfigurable Hardware

    Zaykov, P. & Kuzmanov, GK., 2011, International Symposium on Applied Reconfigurable Computing. Koch, A., Krishnamurthy, R., McAllister, J., Woods, R. & El-Ghazawi, T. (eds.). Heidelberg: Springer, p. 363-374 12 p. (Lecture Notes in Computer Science; vol. 6578).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  27. Architectural support for 3D graphics in the complex streamed instruction set

    Cheresiz, D., Juurlink, BHH., Vassiliadis, S. & Wijshoff, HAG., 2002, Parallel and distributed computing and systems; Proceedings of the 14th IASTED International conference. Akl, SG. & Gonzalez, T. (eds.). Anaheim: ACTA Press, p. 536-542 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  28. Architecture and design flow for a debug event distribution interconnect

    Pereira de Azevedo Filho, AP., Vermeulen, B. & Goossens, KGW., 2012, 30th IEEE International conference on computer design. s.n. (ed.). s.l.: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  29. Architecture design principles for the integration of synchronization interfaces into network-on-chip switches

    Ludovici, D., Strano, A. & Bertozzi, D., 2009, Second International workshop on network on chip architectures. s.n. (ed.). New York, NY, USA: Association for Computing Machinery (ACM), p. 31-36 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  30. Architecture of high speed switches and internet routers

    Mhamdi, LL. & Vassiliadis, S., 2005, Symposium proceedings Architectures and compilers for embedded systems (ACES). s.n. (ed.). Gent: Academia Press, p. 62-65 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  31. Area constraint propagation in high level synthesis

    Nane, R., Sima, VM. & Bertels, KLM., 2012, International conference on field-programmable technology. s.n. (ed.). New York: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  32. Area efficient, High speed parallel counter circuits using charge recycling threshold logic

    Celinski, P., Abbott, D. & Cotofana, SD., 2003, ISCAS 2003; Proceedings of the 2003 IEEE international symposium on circuits and systems. Piscataway: IEEE Society, p. 233-236 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  33. ArrowSAM: In-Memory Genomics Data Processing Using Apache Arrow

    Ahmad, T., Ahmed, N., Peltenburg, J. & Al-Ars, Z., 2020, 2020 3rd International Conference on Computer Applications & Information Security (ICCAIS): Proceedings. IEEE, p. 1-6 6 p. 9096725

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  34. Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints

    Ludovici, D., Gilabert, F., Medardoni, S., Gomez, C., Gomez, ME., Lopez, P., Gaydadjiev, GN. & Bertozzi, D., 2009, Proceedings design, automation and test in Europa. s.n. (ed.). Piscataway: IEEE Society, p. 562-565 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  35. Asynchronous Charge Sharing Power Consistent Montgomery Multiplier

    Chen, J., Tisserand, A., Popovici, E. & Cotofana, SD., 2015, Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems. Jones, IW. & Sparso, J. (eds.). Piscataway: IEEE Society, p. 132-138 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  36. Atomistic-level hysteresis-aware graphene structures electron transport model

    Wang, H., Cucu Laurenciu, N., Jiang, Y. & Cotofana, S. D., 2019, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers (IEEE), Vol. 2019-May. p. 1-5 5 p. 8702106

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  37. Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers

    Papameletis, C., Keller, B., Chickermane, V., Marinissen, EJ. & Hamdioui, S., 2013, 18th IEEE European Test Symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  38. Automated HDL generation: comparative evaluation

    Yankova, YD., Bertels, K., Vassiliadis, S., Meeuws, RJ. & Virginia, A., 2007, 2007 IEEE intl. Symposium on Circuits and Systems. Piscataway: IEEE Society, p. 2750-2753 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  39. Automated digital circuits design based on single-grain si TFTs fabricated through u-Czochralski (grain filter) process

    Fang, W., van Genderen, AJ., Ishihara, R., Vikas, R., Karaki, N., Hiroshima, Y., Inoue, S., Shimoda, T., Metselaar, JW. & Beenakker, CIM., 2006, The 13th intl. workshop on Active-Matrix flatpanel displays and devices. s.n. (ed.). Japan: Japan Society of Applied Physics, p. 47-50 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  40. Automated hybrid interconnect design for FPGA accelerators using data communication profiling

    Pham Quoc Cuong, P., Al-Ars, Z. & Bertels, K., 2014, Proceedings - IEEE 28th International Parallel and Distributed Processing Symposium Workshops. Parashar, M. (ed.). Los Alamitos, CA, USA: IEEE, p. 151-160 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  41. Automatic analyses of memory faulty behaviour in defective memories

    Al-Ars, Z. & Hamdioui, S., 2007, Design & Technology of Integrated Systems 2007. Hamdiuoi, S., O. A. (ed.). Piscataway: IEEE Society, p. 41-46 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  42. Automatic hardware generation for the Molen reconfigurable architecture: a G721 case study

    Theodoropoulos, D., Yankova, YD., Kuzmanov, GK. & Bertels, K., 2007, Annual Workshop on Circuits, Systems and Signal Processing. s.n. (ed.). utrecht: STW, p. 380-387 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  43. Automatic instruction-set extensionswith the linear complexity spiral search

    Galuzzi, C., Theodoropoulos, D., Meeuws, RJ. & Bertels, K., 2008, 2008 international conference on reconfigurable computing and FPGAs. s.n. (ed.). Piscataway: IEEE Society, p. 31-36 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  44. Automatic selection of application-specific instruction-set extensions

    Galuzzi, C., Panainte, E., Yankova, YD., Bertels, K. & Vassiliadis, S., 2006, Intl. Conf. on Hardware/Software Codesign and Systems Synthesis. s.n. (ed.). Piscataway: IEEE Society, p. 160-165 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  45. Automating defects simulation and fault modeling for SRAMs

    Di Carlo, S., Prinetto, P., Scionti, A. & Al-Ars, Z., 2008, IEEE Intl. High Level Design Validation and Test workshop 2008. s.n. (ed.). s.l.: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  46. Autonomic computing systems: issues and challenges

    Nami, MR., Bertels, KLM. & Vassiliadis, S., 2006, 17th Annual Workshop on Circuits Systems and Signal Processing. s.n. (ed.). Utrecht: Dutch Technology Foundation, p. 538-543 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  47. Avoiding data conversions in embedded media processors

    Juurlink, BHH., Shahbahrami, A. & Vassiliadis, S., 2005, Proceedings of the 20th ACM symposium on applied computing. s.n. (ed.). New York: Association for Computing Machinery (ACM), p. 901-902 2 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  48. BIST enhancement for detecting bit/byte write enable faults in SOC SCRAMs

    Hamdioui, S., Al-Ars, Z., Jimenez, J. & Calero, J., 2008, 2nd IEEE Intl. Conf. on Signals, Circuits & Systems. s.n. (ed.). s.l.: IEEE Society, p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  49. BTI Impacts on logical gates in nano-scale CMOS technology

    Seyab, MSK., Hamdioui, S., Kukner, H., Catthoor, F. & Raghavan, P., 2012, 15th IEEE Symposium on design and diagnostics of electronic circuits and systems. s.n. (ed.). s.l.: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  50. BTI analysis of SRAM write driver

    Agbo, IO., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S. & Catthoor, F., 2015, Proceedings of the 10th International Design and Test Symposium, IDT 2015. Kurdahi, F., Mir, S. & Yu, MO. (eds.). Piscataway: IEEE Society, p. 100-105 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  51. Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector

    Kritchallo, V., Braithwaite, B., Vermij, E., Bertels, K. & Al-Ars, Z., 2016, Architecture of Computing Systems- ARCS 2016: Proceedings of the 29th International Conference on Architecture of Computing Systems. Hannig, F., Cardoso, J. M. P., Pionteck, T., Fey, D., Schröder-Preikschat, W. & Teich, J. (eds.). Cham: Springer, p. 251-262 12 p. (Lecture Notes in Computer Science; vol. 9367).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  52. Bandwidth analyses for reusing functional interconnect as test access mechanism

    van den Berg, A., Ren, R., Marinissen, E., Gaydadjiev, GN. & Goossens, KGW., 2008, 13th European test Symposium. s.n. (ed.). Piscataway: IEEE Society, p. 21-26 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  53. Basic building blocks for effective single electron tunneling technology based computation

    Meenderinck, CH. & Cotofana, SD., 2006, Proceedings 2006 International Semiconductor conference. s.n. (ed.). Piscataway: IEEE Society, p. 57-60 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  54. Beamforming in sparse, random, 3D array antennas with fluctuating element locations

    Bentum, M. J., Lager, I. E., Bosma, S., Bruinsma, W. P. & Hes, R., 2015, 2015 9th European Conference on Antennas and Propagation, EuCAP 2015. Piscataway, NJ: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  55. Bias temperature instability analysis in SRAM decoder

    Seyab, MSK., Hamdioui, S., Kukner, H., Raghavan, P. & Catthoor, F., 2013, Proceedings 18th IEEE European Test Symposium. Girard, P. & Peng, Z. (eds.). Los Alamitos, CA, USA: IEEE Society, p. 1-1 1 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  56. Bias temperature instability analysis of FinFET based SRAM cells

    Seyab, MSK., Agbo, IO., Hamdioui, S., Kukner, H., Kaczer, B., Raghavan, P. & Catthoor, F., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Nebel, W. & Fettweis, G. (eds.). Leuven, Belgium: EDAA, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  57. Binary addition based on single electron tunneling devices

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2004, IEEE-NANO 2004 Proceedings. Piscataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  58. Binary multiplication based on Single Electron Tunneling

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2004, 15th IEEE International conference on application-specific systems, architectures, and processors - ASAP 2004. Werner, B. (ed.). Piscataway: IEEE, p. 152-166 15 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  59. Bioinformatics specific cell BE ISA extensions

    Isaza, S. & Gaydadjiev, GN., 2008, 19th Annual Workshop on Circuits, Systems and Signal Processing. s.n. (ed.). eindhoven: STW, p. 52-55 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  60. Bit line coupling memory tests for single cell fails in SRAMs

    Irobi, IS., Al-Ars, Z. & Hamdioui, S., 2010, 28th IEEE VLSI test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  61. Bit-Flip Aware Control-Flow Error Detection

    Nazarian, G., Rodrigues, DG., Moreira, A., Carro, L. & Gaydadjiev, GN., 2015, Proceedings of the 23rd Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2015. Daneshtalab, M., Aldinucci, M., Leppanen, V., Lilius, J. & Brorsson, M. (eds.). Piscataway: IEEE Society, p. 215-221 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  62. Bitstream compression techniques for virtex 4 FPGAS

    Stefan, RA. & Cotofana, SD., 2008, 2008 Intl. conference on Field Programmable Logic and Applications. Kebschull, U., Platzner, M. & Teich, J. (eds.). Heidelberg: IEEE Society, p. 323-328 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  63. Block based compression storage expected performance

    Vassiliadis, S., Cotofana, SD. & Stathis, P., 2000, HPC 2000: proceeding. NJ Dimopoulos & KF Li (eds.). S.l.: Kluwer Academic Publishers, p. 389-406 18 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  64. Boolean Logic Gate Exploration for Memristor Crossbar

    Xie, L., Du Nguyen, H. A., Taouil, M., Hamdioui, S. & Bertels, K., 2016, Proceedings - 11th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016. Danvers, MA: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  65. Buffer design trade-offs for single electron logic gates

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2005, Proceedings of 2005 5th IEEE Conference on Nanotechnology. s.n. (ed.). Piscataway: IEEE Society, p. 433-436 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  66. Buffered crossbar fabrics based on network on chip

    Mhamdi, LL., Goossens, KGW. & Varela Senin, I., 2010, 8th annual communication networks and services research conference. s.n. (ed.). Piscataway: IEEE Society, p. 74-79 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  67. Building blocks for delay-insensitive circuits using single electron tunneling devices

    Safiruddin, S. & Cotofana, SD., 2007, 2007 7th IEEE international conference on nanotechnology. s.n. (ed.). Piscataway: IEEE Society, p. 704-708 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  68. Building blocks for electron counting arithmetic

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 222-228 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  69. Building blocks for fluctuation based calculation in single electron tunneling technology

    Safiruddin, S., Cotofana, SD., Peper, F. & Lee, J., 2008, 2008 eighth IEEE conference on nanotechnology. s.n. (ed.). s.l.: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  70. CAPI-Flash Accelerated Persistent Read Cache for Apache Cassandra

    Sendir, B., Govindaraju, M., Odaira, R. & Hofstee, P., 2018, 2018 IEEE 11th International Conference on Cloud Computing (CLOUD). Bilof, R. (ed.). Piscataway: IEEE, p. 220-228 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  71. CIM-SIM: Computation in Memory SIMuIator

    Banagozar, A., Vadivel, K., Stuijk, S., Corporaal, H., Wong, S., Lebdeh, M. A., Yu, J. & Hamdioui, S., 27 May 2019, SCOPES'19: Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems. Stuijk, S. (ed.). New York, NY: Association for Computing Machinery (ACM), p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  72. CIM100x: Computation in-Memory Architecture Based on Resistive Devices

    Hamdioui, S., Taouil, M., Du Nguyen, H. A., Haron, A., Xie, L. & Bertels, K., 2016, Proceedings of CNNA 2016: 15th International Workshop on Cellular Nanoscale and their Applications. Berlin: VDE, p. 95-96 2 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  73. CMOS implementation of generalized threshold functions

    Padure, MD., Cotofana, SD. & Vassiliadis, S., 2003, Computatational methods in neural modeling: seventh international work-conference on artificial and natural neural networks, IWANN 2003. Mira, J. & Álvarez, JR. (eds.). Berlin: Springer, p. 65-72 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  74. CMOS scaling impacts on reliability, what do we understand?

    Seyab, MSK., Haron, NZB. & Hamdioui, S., 2008, 19th Annual Workshop on Circuits, Systems and Signal Processing. s.n. (ed.). eindhoven: STW, p. 260-266 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  75. CONAN - a design exploration framework for reliable nano-electronics architectures

    Cotofana, SD., Schmid, A., Leblebici, Y., Ionescu, A., Soffke, O., Zipf, P., Glesner, M. & Rubio, A., 2005, Proceedings of the 16th IEEE International conference on Application-Specific Systems Architectures and Processors (ASAP). Vassiliadis, S., Dimopoulos, N. & Rajopadhye, S. (eds.). Los Alamitos: IEEE Society, p. 260-267 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  76. CORDIC scenario for Kalman-based channel estimation

    Sima, M., McGuire, M., Iancu, D. & Glossner, CJ., 2005, Proceedings of the IEEE Pacific Rim conference on communications, computers and signal processing. s.n. (ed.). Piscataway, USA: IEEE Society, p. 165-168 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  77. CORDIC-augmented sandbridge processor for channel equalization

    Sima, M., Glossner, CJ., Iancu, D., Ye, H., Iancu, A. & Hoane, AJ., 2005, Embedded computer systems: architectures, modeling, and simulation: 5th International workshop, SAMOS 2005. Hämäläinen, TD., Pimentel, AD., Takala, J. & Vassiliadis, S. (eds.). Heidelberg, Germany: Springer, p. 152-162 11 p. (Lecture Notes in Computer Science; vol. 3553).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  78. CRB analysis of the impact of unknown receiver noise on phased array calibration

    van der Tol, S. & Wijnholds, SJ., 2006, IEEE Workshop on Sensor Array and Multichannel Signal Processing, 2006. IEEE (ed.). Waltham, MA, USA: IEEE Society, p. 185-189 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  79. Cache replacement policies for IP address lookups

    Guo, R., Delgado-Frias, JG. & Wong, S., 2007, 5th IASTEDintl. conf. on Circuits, Signals, and Systems. Delgado-Frias, J. G. (ed.). Zurich: ACTA Press, p. 70-75 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  80. Calculation of worst-case execution time for multicore processors using deterministic execution

    Mushtaq, H., Al-Ars, Z. & Bertels, K., 2015, Proceedings of the 2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS. Reis, R. & Nunes de Lima, R. (eds.). Piscataway: IEEE Society, p. 33-39 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  81. Can SG-FET replace Fet in sleep mode circuits

    Enachescu, M., Cotofana, SD. & Tsamados, D., 2009, 4th international conference on Nano-Networks. s.n. (ed.). s.l.: s.n., p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  82. Capacitive threshold logic: a designer perspective

    Padure, MD., Dan, C., Cotofana, SD., Bodea, M. & Vassiliadis, S., 1999, CAS '99 proceedings. Vol. 1. S.l.: IEEE Society, p. 81-84 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  83. Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip

    Ludovici, D., Gaydadjiev, GN., Bertozzi, D. & Benini, L., 2009, Proceedings of the 2009 Great Lakes symposium on VLSI. s.n. (ed.). New York: Association for Computing Machinery (ACM), p. 125-128 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  84. Casta diva-a design for variability platform

    Cotofana, SD. & Meenderinck, CH., 2008, 2008 Intl. Semiconductor Conference. s.n. (ed.). s.l.: IEEE Society, p. 373-376 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  85. Centralized matchmaking - An empirical study

    Sigdel, K., Li, S., Pourebrahimi, B., Bertels, K. & Vassiliadis, S., 2005, Proceedings of the SAFE & ProRISC 2005. s.n. (ed.). Utrecht: Dutch Technology Foundation, p. 438-444 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  86. Centralized matchmaking for minimal agents

    Bertels, K., Panchanathan, N., Vassiliadis, S. & Ebrahimi, BP., 2004, Proceedings of the 16th IASTED International conference Parallel and Distributed Computing and Systems. Gonzalez, T. (ed.). Anaheim: ACTA Press, p. 608-613 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  87. Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation

    Zandrahimi, M., Al-Ars, Z., Debaud, P. & Castillejo, A., 2016, Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. Teich, J. (ed.). Piscataway, NJ: IEEE, p. 1018-1019 2 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  88. Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip

    Hansson, A., Coenen, M. & Goossens, KGW., 2007, International Conference on Hardware/Software Codesign and System Synthesis. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 149-154 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  89. Cluster-based Apache Spark implementation of the GATK DNA analysis pipeline

    Mushtaq, H. & Al-Ars, Z., 2015, Proceedings of the International Conference on Bioinformatics and Biomedicine. Huan, J., Miyano, S. & Shehu, A. (eds.). Piscataway: IEEE Society, p. 1471-1477 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  90. CoMik: A predictable and cycle-accurately composable real-time microkernel

    Nelson, AT., Beyranvand Nejad, A., Molnos, AM., Koedam, M. & Goossens, KGW., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Fettweis, G. & Nebel, W. (eds.). Leuven, Belgium: EDAA, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  91. Coarse reconfigurable multimedia unit extension

    Wong, JSSM., Cotofana, SD. & Vassiliadis, S., 2001, Proceedings. K Klöckner (ed.). Los Alamitos: IEEE, p. 235-242 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  92. Code positioning for VLIW architectures

    Cilio, AGM. & Corporaal, H., 2001, HPCN Europe 2001: proceedings. G Goos & ... [et Al] (eds.). Berlin: Springer, p. 332-343 12 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  93. Collaboration of reconfigurable processors in grid computing for multimedia kernels

    Ahmadi, M., Shahbahrami, A. & Wong, JSSM., 2010, Grid and Pervasive Computing 2010. s.n. (ed.). Berlijn: Springer, p. 5-14 10 p. (Lecture Notes in Computer Science; vol. 6104/2010).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  94. Color space conversion for MPEG decoding on FPGA-augmented trimedia processor

    Sima, M., Vassiliadis, S., Cotofana, SD. & van Eijndhoven, JTJ., 2003, ASAP 2003; Proceedings 2003, the IEEE international conference on application-specific systems, archtectures and processors. Deprettere, E., Bhattacharyya, S., Cavallaro, J., Darte, A. & Thiele, L. (eds.). Piscataway: IEEE Society, p. 250-259 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  95. Combined multiplication and sum-of-squares units

    Schulte, MJ., Marquette, L., Krithivasan, S., Walters, EG. & Glossner, CJ., 2003, ASAP 2003; Proceedings 2003, the IEEE international conference on application-specific systems, archtectures and processors. Deprettere, E., Bhattacharyya, S., Cavallaro, J., Darte, A. & Thiele, L. (eds.). Piscataway: IEEE Society, p. 204-215 12 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  96. Combining Fault Analysis Technologies for ISO26262 Functional Safety Verification

    Augusto da Silva, F., Bagbaba, A. C., Hamdioui, S. & Sauer, C., 2020, Proceedings - 2019 IEEE 28th Asian Test Symposium, ATS 2019. Bilof, R. S. (ed.). Piscataway: IEEE, Vol. 2019-December. p. 129-134 6 p. 8949396. (2019 IEEE 28TH ASIAN TEST SYMPOSIUM (ATS)).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  97. Combining voltage scaling and processor shutdown to reduce energy in embedded multiprocessors

    de Langen, P. & Juurlink, B., 2007, Proceeding of the 13th Annual conference of the ASCI. Veenman CJ Jansen FW, P. GEO. (ed.). Delft: ASCI, p. 195-202 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  98. Communication Service for hardware tasks executed on dynamic and partial reconfigurable resources

    Narayanan, S., Devaux, L. & Sourdis, I., 2011, 2011 IEEE/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC). Tsui, C-Y. & Mir, S. (eds.). Piscataway, NJ, USA: IEEE Society, p. 196-199 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  99. Communication-Aware Parallelization Strategies for High Performance Applications

    Ashraf, I., Bertels, K., Khammassi, N. & le Lann, JC., 2015, Proceedings of the IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015. Mohanty, SP. & Belleville, M. (eds.). Piscataway: IEEE Society, p. 539-444 94 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  100. Communication-aware HW/SW co-design for heterogeneous multicore platforms

    Ashraf, I., Ostadzadeh, SA., Meeuws, RJ. & Bertels, KLM., 2012, 10th International workshop on dynamic analysis. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  101. Communication-centric SoC debug using transactions

    Vermeulen, B., Goossens, KGW., van Steeden, R. & Bennebroek, M., 2007, 12th IEEE european Test Symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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