1. Article › Scientific › Peer-reviewed
  2. Cross-layer designs architecture for LEO satellite ad hoc network

    Chang, Z. & Gaydadjiev, GN., 2008, In : Lecture Notes in Computer Science. 5031, p. 164-176 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  3. Custom architecture for multicore audio Beamforming systems

    Theodoropoulos, D., Kuzmanov, GK. & Gaydadjiev, GN., 2013, In : ACM Transactions on Embedded Computing Systems. 13, 2, p. 1-26 26 p.

    Research output: Contribution to journalArticleScientificpeer-review

  4. Customisation of on-chip network interconnects and experiments in field-programmable gate arrays

    Hur, JY., Stefanov, TP., Wong, JSSM. & Goossens, KGW., 2012, In : IET Computers and Digital Techniques. 6, 1, p. 59-68 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  5. DOPA: GPU-based protein alignment using database and memory access optimizations

    Hasan, L., Kentie, M. & Al-Ars, Z., 2011, In : BMC Research Notes. 4:261, p. 1-11 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  6. Defect and Fault Modeling Framework for STT-MRAM Testing

    Wu, L., Rao, S., Taouil, M., Cardoso Medeiros, G., Fieback, M., Marinissen, E. J., Kar, G. S. & Hamdioui, S., 17 Dec 2019, In : IEEE Transactions on Emerging Topics in Computing. 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  7. Dependable multicore architectures at nanoscale: The view from Europe

    Ottavi, M., Pontarelli, S., Gizopoulos, D., Paschalis, A., Bolchini, C., Michael, MK., Anghel, L., Tahoori, M., Reviriego, P., Bringmann, O., Izosimov, V., Manhaeve, H., Strydis, C. & Hamdioui, S., 2015, In : IEEE Design & Test of Computers. 32, 2, p. 17-28 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  8. Design and implementation of an operating system for composable processor sharing

    Hansson, A., Molnos, AM., Nelson, AT., Ambrose, JA. & Goossens, KGW., 2011, In : Microprocessors and Microsystems. 35, p. 246-260 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  9. Design and performance evaluation of an adaptive FPGA for network applications

    Kachris, C., Wong, S. & Vassiliadis, S., 2009, In : Microelectronics Journal. 40, 7, p. 1103-1110 8 p.

    Research output: Contribution to journalArticleScientificpeer-review

  10. Design trade-offs in customized on-chip crossbar schedulers

    Hur, JY., Wong, S. & Stefanov, TP., 2008, In : Journal of V LSISignal Processing. p. 1-17 17 p.

    Research output: Contribution to journalArticleScientificpeer-review

  11. Dynamic Trade-off among Fault Tolerance, Energy Consumption, and Performance on a Multiple-issue VLIW Processor

    Sartor, A. L., Becker, P. H. E., Hoozemans, J., Wong, S. & Beck, A. C. S., 2018, In : IEEE Transactions on Multi-Scale Computing Systems. 4, 3, p. 327-339 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  12. Dynamic faults in random-access-memories: concept, fault models and tests

    Hamdioui, S., Al-Ars, Z., van de Goor, AJ. & Rodgers, M., 2003, In : Journal of Electronic Testing: theory and applications. 19, 2, p. 195-205 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  13. Editorial Note on Memristor Models, Circuits and Architectures

    Sirakoulis, G. C. & Hamdioui, S., 2016, In : International Journal of Unconventional Computing. 12, 4, p. 247-250 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  14. Effects of parametric constraints on the CRLB in gain and phase estimation problems

    Wijnholds, SJ. & van der Veen, AJ., 2006, In : IEEE Signal Processing Letters. 13, 10, p. 620-623 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  15. Efficent and highly portable deterministic multithreading (DetLock)

    Mushtaq, H., Al-Ars, Z. & Bertels, KLM., 2013, In : Computing. 95, p. 1-17 17 p.

    Research output: Contribution to journalArticleScientificpeer-review

  16. Efficient Acceleration of the Pair-HMMs Forward Algorithm for GATK HaplotypeCaller on Graphics Processing Units

    Ren, S., Bertels, K. & Al-Ars, Z., 2018, In : Evolutionary Bioinformatics. 14, p. 1-12 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  17. Efficient datapath merging for the overhead reduction of run-time reconfigurable systems

    Fazlali, M., Zakerolhosseini, A. & Gaydadjiev, GN., 2010, In : Journal of Supercomputing: an international journal of high-performance computer design, analysis and use. 52, 3

    Research output: Contribution to journalArticleScientificpeer-review

  18. Efficient datapath merging for the overhead reduction of run-time reconfigurable systems

    Fazlali, M., Zakerolhosseini, A. & Gaydadjiev, GN., 2012, In : Journal of Supercomputing: an international journal of high-performance computer design, analysis and use. 59, 2, p. 636-657 22 p.

    Research output: Contribution to journalArticleScientificpeer-review

  19. Efficient multicast support in high-speed packet switches

    Mhamdi, LL., Gaydadjiev, GN. & Vassiliadis, S., 2008, In : Journal of Networks. 2, 3, p. 28-35 8 p.

    Research output: Contribution to journalArticleScientificpeer-review

  20. Efficient task scheduling for runtime reconfigurable systems

    Fazlali, M., Sabeghi, M., Zakerolhosseini, A. & Bertels, KLM., 2010, In : Journal of Systems Architecture. 56, 11, p. 623-632 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  21. Efficient tests for realistic faults in dual-port SRAMS

    Hamdioui, S. & van de Goor, AJ., 2002, In : IEEE Transactions on Computers. 51, 5, p. 460-474 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

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