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  1. Article › Scientific › Peer-reviewed
  2. Exploiting SPMD Horizontal Locality

    Gou, C. & Gaydadjiev, GN., 2011, In : IEEE Computer Architecture Letters. 10, 1, p. 20-23 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  3. Exploring complex brain-simulation workloads on multi-GPU deployments

    Van Der Vlag, M. A., Smaragdos, G., Al-Ars, Z. & Strydis, C., 2019, In : ACM Transactions on Architecture and Code Optimization. 16, 4, 25 p., 53.

    Research output: Contribution to journalArticleScientificpeer-review

  4. FLUX interconnection networks on demand

    Vassiliadis, S. & Sourdis, I., 2007, In : Journal of Systems Architecture. 53, 10, p. 777-793 17 p.

    Research output: Contribution to journalArticleScientificpeer-review

  5. Fan-out enabled spin wave majority gate

    Mahmoud, A., Vanderveken, F., Adelmann, C., Ciubotaru, F., Hamdioui, S. & Cotofana, S., 2020, In : AIP Advances. 10, 3, p. 035119-1 - 035119-6 6 p., 035119.

    Research output: Contribution to journalArticleScientificpeer-review

  6. Fault-tolerant quantum error correction on near-term quantum processors using flag and bridge qubits

    Lao, L. & Almudever, C. G., 2020, In : Physical Review A. 101, 3, 11 p., 032333.

    Research output: Contribution to journalArticleScientificpeer-review

  7. Frame-based Programming, Stream-Based Processing for Medical Image Processing Applications

    Hoozemans, J., de Jong, R., van der Vlugt, S., Van Straten, J., Elango, U. K. & Al-Ars, Z., 2019, In : Journal of Signal Processing Systems. 91, 1, p. 47-59 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  8. GASAL2: a GPU accelerated sequence alignment library for high-throughput NGS data

    Ahmed, N., Lévy, J., Ren, S., Mushtaq, H., Bertels, K. & Al-Ars, Z., 25 Oct 2019, In : BMC Bioinformatics. 20, 1, p. 1-20 20 p.

    Research output: Contribution to journalArticleScientificpeer-review

  9. GPU Accelerated Sequence Alignment with Trace-back for GATK HaplotypeCaller

    Ren, S., Ahmed, N., Bertels, K. & Al-Ars, Z., 2019, In : BMC Genomics. 20, p. 103-116 184.

    Research output: Contribution to journalArticleScientificpeer-review

  10. GRAAL: a framework for low-power 3D graphics accelerators

    Juurlink, B., Crisu, D., Antochi, I., Cotofana, SD. & Vassiliadis, S., 2008, In : IEEE Computer Graphics and Applications. 28, 4, p. 63-73 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  11. Gaps and requirements for automatic generation of space layouts with optimised energy performance

    Du, T., Turrin, M., Jansen, S., van den Dobbelsteen, A. & Fang, J., 2020, In : Automation in Construction. 116, 18 p., 103132.

    Research output: Contribution to journalArticleScientificpeer-review

  12. Graphene Nanoribbon Based Complementary Logic Gates and Circuits

    Jiang, Y., Cucu Laurenciu, N., Wang, H. & Cotofana, S. D., 2019, In : IEEE Transactions on Nanotechnology. 18, p. 287-298 12 p., 8666174.

    Research output: Contribution to journalArticleScientificpeer-review

  13. HArtes: hardware-software codesign for heterogeneous multicore platforms

    Bertels, KLM., Sima, VM., Yankova, YD. & Kuzmanov, GK., 2010, In : IEEE Micro. 30, 5, p. 88-97 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  14. Hardware acceleration of BWA-MEM genomic short read mapping for longer read lengths

    Houtgast, E. J., Sima, V-M., Bertels, K. & Al-Ars, Z., 2018, In : Computational Biology and Chemistry. 75, p. 54-64 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  15. Hardwired MPEG-4 repetitive padding

    Kuzmanov, GK., Vassiliadis, S. & van Eijndhoven, JTJ., 2005, In : IEEE Transactions on Multimedia. 7, 2, p. 261-268 8 p.

    Research output: Contribution to journalArticleScientificpeer-review

  16. Hierarchical templates for simulated intelligence

    Niculiu, T. & Cotofana, SD., 2004, In : EUROSIM- Simulation News Europe. 38/39, p. 16-22 7 p.

    Research output: Contribution to journalArticleScientificpeer-review

  17. Hierarchical testability assisted intelligent simulation

    Niculiu, T., Aktouf, C. & Cotofana, SD., 2004, In : International Journal of Modelling & Simulation. 24, 1, p. 26-36 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  18. High-bandwidth address generation unit

    Galuzzi, C., Gou, C., Calderon, H., Gaydadjiev, GN. & Vassiliadis, S., 2008, In : Journal of V LSISignal Processing. p. 1-12 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  19. High-performance switching based on buffered crossbar fabrics

    Mhamdi, L., Hamdi, M., Kachris, C., Wong, S. & Vassiliadis, S., 2006, In : Computer Networks. 50, p. 2271-2285 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  20. High-performance, Cost-effective 3D Stacked Wide-Operand Adders

    Voicu, G. R. & Cotofana, S. D., 4 Aug 2016, In : IEEE Transactions on Emerging Topics in Computing. 5, 2, p. 179-192 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  21. Hybrid resource discovery mechanism in ad hoc grid using structured overlay

    Abdullah, MT., Onana Alima, L., Sokolov, S., Calomme, D. & Bertels, K., 2009, In : Lecture Notes in Computer Science. 5455, p. 108-119 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

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