1. 2000
  2. System for preparing instructions for instruction parrellel processor and system with mechanism for branching in the middle of a compound instruction

    Vassiliadis, S., Blaner, B. & Jeremiah, TL., 2000, Priority date 25 Feb 1998

    Research output: PatentOther research output

  3. System for preparing instructions for instruction parrellel processor and system with mechanism for branching in the middle of a compound instruction

    Vassiliadis, S., Blaner, B. & Jeremiah, TL., 2000, Priority date 29 Apr 1998

    Research output: PatentOther research output

  4. Test point insertion for compact test sets

    Geuzebroek, MJ., van Linden, JT. & van de Goor Ph D, AJ., 2000, International tests conference 2000: proceedings. Los Alamitos: IEEE, p. 292-301 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  5. Testing address decoder faults in two-port memories: fault models, test, consequences of port restrictions, and test strategy

    Hamdioui, S. & van de Goor Ph D, AJ., 2000, In : Journal of Electronic Testing: theory and applications. 16, 5, p. 487-498 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  6. The -Scheduler: a multiwavelength scheduling switch

    Lang, JP., Varvarigos, EA. & Blumenthal, DJ., 2000, In : Journal of Lightwave Technology. 18, 8, p. 1049-1063 15 p.

    Research output: Contribution to journalArticleScientific

  7. The Artemis architecture workbench

    Pimentel, AD., van der Wolf, P., Deprettere, EFA., Hertzberger, LO., van Eijndhoven, JTJ. & Vassiliadis, S., 2000, Proceedings. JP Veen (ed.). Utrecht: STW Technology Foundation, p. 53-62 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  8. The ManArray embedded processor architecture

    Pechanek, GG. & Vassiliadis, S., 2000, Proceedings, vol. 1. F Vajda (ed.). Los Alamitos: IEEE, p. 348-355 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  9. The impact of code positioning on ILP scheduling

    Cilio, AGM. & Corporaal, H., 2000, ASCI 2000 proceedings. LJ Vliet, V. (ed.). Delft: Advanced School for Computing and Imaging, p. 37-44 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  10. The lambda-Scheduler: a multiwavelength scheduling switch

    Lang, JP., Varvarigos, EA. & Blumenthal, DJ., 2000, Proceedings thirty-seventh annual Allerton conference on communication, control and computing. B Hajek & RS Sreenivas (eds.). Urbana: University of Illinois, p. 689-698 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  11. The scalable networking scheme for high-speed networks

    Yeh, CH. & Varvarigos, EA., 2000, ICC 2000 conference record: global convergence through communications. Piscataway: IEEE Society, p. 1335-1342 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

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