1. 2019
  2. Experimental error mitigation via symmetry verification in a variational quantum eigensolver

    Sagastizabal, R., Bonet-Monroig, X., Singh, M., Rol, M. A., Bultink, C. C., Fu, X., Ostroukh, V. P., Muthusubramanian, N., Bruno, A., Beekman, M., Haider, N., O'Brien, T. E. & Dicarlo, L., 2019, In : Physical Review A. 100, 1, 6 p., 010302.

    Research output: Contribution to journalArticleScientificpeer-review

  3. Frame-based Programming, Stream-Based Processing for Medical Image Processing Applications

    Hoozemans, J., de Jong, R., van der Vlugt, S., Van Straten, J., Elango, U. K. & Al-Ars, Z., 2019, In : Journal of Signal Processing Systems. 91, 1, p. 47-59 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  4. GPU Accelerated Sequence Alignment with Trace-back for GATK HaplotypeCaller

    Ren, S., Ahmed, N., Bertels, K. & Al-Ars, Z., 2019, In : BMC Genomics. 20, p. 103-116 184.

    Research output: Contribution to journalArticleScientificpeer-review

  5. Graphene Nanoribbon Based Complementary Logic Gates and Circuits

    Jiang, Y., Cucu Laurenciu, N., Wang, H. & Cotofana, S. D., 2019, In : IEEE Transactions on Nanotechnology. 18, p. 287-298 12 p., 8666174.

    Research output: Contribution to journalArticleScientificpeer-review

  6. Hardware-based aging mitigation scheme for memory address decoder

    Kraak, D., Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S. & Catthoor, F., 2019, 2019 IEEE European Test Symposium (ETS). IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  7. Mapping of Lattice Surgery-based Quantum Circuits on Surface Code Architectures

    Lao, L., van Wee, B., Ashraf, I., van Someren, J., Khammassi, N., Bertels, K. & Almudever, C. G., 2019, In : Quantum Science and Technology. 4, 1, p. 1-20 20 p., 015005.

    Research output: Contribution to journalArticleScientificpeer-review

  8. Methodology for Application-Dependent Degradation Analysis of Memory Timing

    Kraak, D., Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S. & Catthoor, F., 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE): Proceedings. IEEE, p. 162-167 6 p. 8715143

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. Non-Equilibrium Green Function-based Verilog-A Graphene Nanoribbon Model

    Jiang, Y., Laurenciu, N. C. & Cotofana, S. D., 2019, 2018 IEEE 18th International Conference on Nanotechnology (IEEE-NANO). Quinn, A., Li, G., Li, W. & Mathewson, A. (eds.). Piscataway, NJ, USA: IEEE, p. 1-4 4 p. 8626396

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. On Basic Boolean Function Graphene Nanoribbon Conductance Mapping

    Jiang, Y., Laurenciu, N. C. & Cotofana, S. D., 2019, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 66, 5, p. 1948-1959 12 p., 8574057.

    Research output: Contribution to journalArticleScientificpeer-review

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