1. Article › Scientific › Peer-reviewed
  2. Analog-to-digital converter based on single-electron tunneling transistors

    Hu, C., Cotofana, SD., Jiang, J. & Cai, Q., 2004, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 12, 11, p. 1209-1213 5 p.

    Research output: Contribution to journalArticleScientificpeer-review

  3. Analysis of RNAseq datasets from a comparative infectious disease zebrafish model using GeneTiles bioinformatics

    Veneman, WJ., de Sonneville, J., van der Kolk, KJ., Ordas, A., Al-Ars, Z., Meijer, AH. & Spaink, HP., 2015, In : Immunogenetics. 67, 3, p. 135-147 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  4. Analysis of the impact of spatial and temporal variations on the stability of SRAM arrays and the mitigation technique using independent-gate devices

    Wang, Y., Cotofana, SD. & Fang, L., 2014, In : Journal of Parallel and Distributed Computing. 74, 6, p. 2521-2529 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  5. Ant colony inspired microeconomic based resource management in ad hoc grids

    Abdullah, MT., Bertels, K. & Onana Alima, L., 2009, In : Lecture Notes in Computer Science. 5529, p. 189-198 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  6. Architectural support for 3D graphics in the complex streamed instruction set

    Cheresiz, D., Juurlink, BHH., Vassiliadis, S. & Wijshoff, HAG., 2002, In : International Journal of Parallel and Distributed Systems & Networks. 5, 4, p. 185-193 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  7. Architecture enhancements for the ADRES coarse-grained reconfigurable array

    Bouwens, F., Berekovic, M., de Sutter, B. & Gaydadjiev, GN., 2008, In : Lecture Notes in Computer Science. LNCS4917, p. 66-81 16 p.

    Research output: Contribution to journalArticleScientificpeer-review

  8. Auction protocols for resource allocations in ad-hoc grids

    Pourebrahimi, B. & Bertels, KLM., 2008, In : Lecture Notes in Computer Science. LNCS5168, p. 520-533 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  9. Avoiding conversion and rearrangements overhead in SIMD architectures

    Shahbahrami, A., Juurlink, B., Borodin, D. & Vassiliadis, S., 2006, In : International Journal of Parallel Programming. 34, 3, p. 237-260 24 p.

    Research output: Contribution to journalArticleScientificpeer-review

  10. BRAM-LUT tradeoff on a polymorphic DES design

    Chaves Fernandes, R., Donchev, B., Kuzmanov, GK., Sousa, L. & Vassiliadis, S., 2008, In : Lecture Notes in Computer Science. LNCS4917, p. 55-65 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  11. Badwidth analysis of functional interconnects used as test access mechanism

    van den Berg, A., Ren, P., Marinissen, E., Gaydadjiev, GN. & Goossens, KGW., 2010, In : Journal of Electronic Testing: theory and applications. 26, 4, p. 453-464 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

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