1. 2017
  2. Low cost multi-error correction for 3D polyhedral memories

    Lefter, M., Marconi, T., Voicu, G. & Cotofana, S., 2017, 2017 IEEE/ACM International Symposium on Nanoscale Architectures. IEEE, p. 13-18 6 p. 8053722

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. Memristive devices: Technology, design automation and computing frontiers

    Barbareschi, M., Bosio, A., Du Nguyen, H. A., Hamdioui, S., Traiola, M. & Vatajelu, E. I., 2017, 2017 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS). Danvers: IEEE, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  4. Memristor For Computing: Myth or Reality?

    Hamdioui, S., Kvatinsky, S., Cauwenberghs, G., Xie, L., Wald, N., Joshi, S., Elsayed, H. M., Corporaal, H. & Bertels, K., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 722-731 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  5. Memristor based computation-in-memory architecture for big data

    Hamdioui, S., Taouil, M. & Bertels, K., 2017, IPC No. H03K; G06F, Priority date 7 Jul 2015, Priority No. WO 2017/007318

    Research output: PatentOther research output

  6. Mitigation of sense amplifier degradation using input switching

    Kraak, D., Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Catthoor, F. & Dehaene, W., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 858-863 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  7. Moving workloads to a better place: Optimizing computer architectures for data-intensive applications

    Vermij, E., 2017, 189 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  8. On the Implementation of Computation-in-Memory Parallel Adder

    Du Nguyen, H. A., Xie, L., Taouil, M., Nane, R., Hamdioui, S. & Bertels, K., 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 8, p. 2206 - 2219 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  9. On the Robustness of Memristor Based Logic Gates

    Xie, L., Du Nguyen, H. A., Yu, J., Taouil, M. & Hamdioui, S., 2017, 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Dietrich, M. & Novak, O. (eds.). Piscataway: IEEE, p. 158-163 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. Pauli Frames for Quantum Computer Architectures

    Riesebos, L., Fu, X., Varsamopoulos, S., García Almudever, C. & Bertels, K., 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. New York: Association for Computing Machinery (ACM), p. 1-6 6 p. 76

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. Predictive Genome Analysis Using Partial DNA Sequencing Data

    Ahmed, N., Bertels, K. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 119-124 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Previous 1...4 5 6 7 8 9 10 11 ...150 Next

ID: 19943