1. 2018
  2. On Carving Basic Boolean Functions on Graphene Nanoribbons Conduction Maps

    Jiang, Y., Cucu Laurenciu, N. & Cotofana, S., 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS) : Proceedings. Piscataway, NY: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. On Effective Graphene Based Computing

    Laurenciu, N. C. & Cotofana, S. D., 2018, 2018 41st International Semiconductor Conference, CAS 2018 - Proceedings. Dinescu, M. A., Dobrescu, D., Muller, A., Cristea, D., Dragoman, M., Muller, R., Ciurea, M. L., Neculoiu, D. & Brezeanu, G. (eds.). Piscataway, NJ, USA: Institute of Electrical and Electronics Engineers (IEEE), Vol. 2018-October. p. 51-58 8 p. 8539757

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  4. On Leveraging Vertical Proximity in 3D Memory Hierarchies

    Lefter, M., 2018, 147 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  5. Porting and Benchmarking of BWAKIT Pipeline on OpenPOWER Architecture

    Kathiresan, N., Al-Ali, R., Jithesh, P., Narayanasamy, G. & Al-Ars, Z., 2018, High Performance Computing : ISC High Performance 2018 International Workshops, Revised Selected Papers. Yokota, R., Weiland, M., Shalf, J. & Alam, S. (eds.). Cham: Springer, p. 402-410 9 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 11203 ).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  6. Quantum Control Architecture: Bridging the Gap between Quantum Software and Hardware

    Fu, X., 2018, 156 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  7. Reliability Modeling and Mitigation for Embedded Memories

    Agbo, I., 2018, 137 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  8. Targeting static and dynamic workloads with a reconfigurable VLIW processor

    Hoozemans, J., 2018, 161 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  9. Testing Resistive Memories: Where Are We and What Is Missing?

    Fieback, M., Taouil, M. & Hamdioui, S., 2018, International Test Conference 2018 - Proceedings. Piscataway, NJ: IEEE, p. 1-9 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. Towards a Scalable Quantum Computer

    Almudever, C. G., Khammassi, N., Hutin, L., Vinet, M., Babaie, M., Sebastiano, F., Charbon, E. & Bertels, K., 2018, Proceedings - 2018 13th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2018. Piscataway, NJ: IEEE, 1 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. cQASM v1.0: Towards a Common Quantum Assembly Language

    Khammassi, N., Guerreschi, G. G., Ashraf, I., Hogaboam, J. W., Almudever, C. G. & Bertels, K., 2018, (Accepted/In press) In : Quantum Science and Technology. PP, p. 1-8

    Research output: Contribution to journalArticleScientificpeer-review

  12. 2017
  13. GPU Accelerated API for Alignment of Genomics Sequencing Data

    Ahmed, N., Mushtaq, H., Bertels, K. & Al-Ars, Z., Nov 2017, 2017 IEEE International Conference on Bioinformatics and Biomedicine (BIBM). Hu, X., Shyu, C. R., Bromberg, Y., Gao, J., Gong, Y., Korkin, D., Yoo, I. & Zheng, J. H. (eds.). Danvers: IEEE, p. 510-515 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  14. An experimental microarchitecture for a superconducting qantum processor

    Fu, X., Rol, M. A., Bultink, C. C., Van Someren, J., Khammassi, N., Ashraf, I., Vermeulen, R. F. L., De Sterke, J. C., Vlothuizen, W. J., Schouten, R. N., García Almudever, C., DiCarlo, L. & Bertels, K., 14 Oct 2017, MICRO 2017 - 50th Annual IEEE/ACM International Symposium on Microarchitecture Proceedings. IEEE, Vol. Part F131207. p. 813-825 13 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  15. Using a Polymorphic VLIW Processor to Improve Schedulability and Performance for Mixed-criticality Systems

    Hoozemans, J., van Straten, J. & Wong, S., Aug 2017, 2017 IEEE 23rd International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA). Danvers: IEEE, p. 1-9 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  16. Restless Tuneup of High-Fidelity Qubit Gates

    Rol, M. A., Bultink, C. C., O'Brien, T. E., De Jong, S. R., Theis, L. S., Fu, X., Luthi, F., Vermeulen, R. F. L., De Sterke, J. C., Bruno, A., Deurloo, D., Schouten, R. N., Wilhelm, F. K. & Dicarlo, L., 24 Apr 2017, In : Physical Review Applied. 7, 4, 041001.

    Research output: Contribution to journalArticleScientificpeer-review

  17. Improved Dynamic Cache Sharing for Communicating Threads on a Runtime-Adaptable Processor

    Hoozemans, J., Lorenzon, A., Schneider Beck, A. C. & Wong, S., Jan 2017, p. 1-9. 9 p.

    Research output: Contribution to conferenceAbstractScientific

  18. A Domain-Specific Language and Compiler for Computation-in-Memory Skeletons

    Yu, J., Hogervorst, T. & Nane, R., 2017, GLSVLSI '17 Proceedings of the on Great Lakes Symposium on VLSI 2017 . New York: Association for Computing Machinery (ACM), p. 71-76 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  19. An experience with Chalcogenide memristors, and implications on memory and computer applications

    Escudero-López, M., Amat, E., Rubio, A. & Pouyan, P., 2017, 2016 Conference on Design of Circuits and Integrated Systems (DCIS). Piscataway, NJ: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  20. BrainFrame: A node-level heterogeneous accelerator platform for neuron simulations

    Smaragdos, G., Chatzikonstantis, G., Kukreja, R., Sidiropoulos, H., Rodopoulos, D., Sourdis, I., Al-Ars, Z., Kachris, C., Soudris, D., De Zeeuw, C. I. & Strydis, C., 2017, In : Journal of Neural Engineering. 14, 6, p. 1-15 15 p., 066008.

    Research output: Contribution to journalArticleScientificpeer-review

  21. Computing device for "big data" applications using memristors

    Hamdioui, S., Taouil, M. & Bertels, K., 2017, IPC No. G11C, Patent No. US 9,824,753, Priority date 21 Oct 2015

    Research output: PatentOther research output

  22. Computing device for "big data" applications using memristors

    Hamdioui, S., Taouil, M. & Bertels, K., 2017, IPC No. G11C, Priority date 21 Oct 2015, Priority No. US 2017/0117041

    Research output: PatentOther research output

  23. Exploiting Idle Hardware to Provide Low Overhead Fault Tolerance for VLIW Processors

    Sartor, A. L., Lorenzon, A. F., Carro, L., Kastensmidt, F., Wong, S. & Beck, A. C. S., 2017, In : ACM Journal on Emerging Technologies in Computing Systems. 13, 2, p. 13:1-13:21 21 p.

    Research output: Contribution to journalSpecial issueScientificpeer-review

  24. Exploring ILP and TLP on a Polymorphic VLIW Processor

    Brandon, A., Hoozemans, J., van Straten, J. & Wong, S., 2017, Architecture of Computing Systems - ARCS 2017: 30th International Conference Proceedings. Knoop, J., Karl, W., Schulz, M., Inoue, K. & Pionteck, T. (eds.). Cham: Springer, p. 177-189 13 p. (Lecture Notes in Computer Science ; vol. 10172).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  25. Fast and accurate workload-level neural network based IC energy consumption estimation

    Cucu Laurenciu, N. & Cotofana, S., 2017, SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. IEEE, p. 1-4 4 p. 7981598

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  26. GPU-Accelerated GATK HaplotypeCaller with Load-Balanced Multi-Process Optimization

    Ren, S., Bertels, K. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 497-502 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  27. Haar-based interconnect coding for energy effective medium/long range data transport

    Cucu Laurenciu, N. & Cotofana, S., 2017, Proceedings - 30th IEEE International System on Chip Conference, SOCC 2017. Alioto, M., Li, H., Becker, J., Schlichtmann, U. & Sridhar, R. (eds.). Piscataway, NJ: IEEE, p. 375-380 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  28. High Performance Streaming Smith-Waterman Implementation with Implicit Synchronization on Intel FPGA using OpenCL

    Houtgast, E., Sima, V. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 492-496 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  29. Impact and Mitigation of Sense Amplifier Aging Degradation Using Realistic Workloads

    Kraak, D., Taouil, M., Agbo, I., Hamdioui, S., Weckx, P., Catthoor, F. & Cosemans, S., 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 12, p. 3464-3472 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  30. Integral Impact of BTI, PVT Variation, and Workload on SRAM Sense Amplifier

    Agbo, I., Taouil, M., Kraak, D., Hamdioui, S., Kükner, H., Weckx, P., Raghavan, P. & Catthoor, F., 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 4, p. 1444-1454 11 p., 7819518.

    Research output: Contribution to journalArticleScientificpeer-review

  31. Interconnect Networks for Resistive Computing Architectures

    Du Nguyen, H. A., Xie, L., Yu, J., Taouil, M. & Hamdioui, S., 2017, 2017 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS). Danvers: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  32. LDPC-Based Adaptive Multi-Error Correction for 3D Memories

    Lefter, M., Voicu, G., Marconi, T., Savin, V. & Cotofana, S., 2017, 2017 IEEE International Conference on Computer Design (ICCD). IEEE, Vol. Piscataway. p. 265-268 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  33. Low cost multi-error correction for 3D polyhedral memories

    Lefter, M., Marconi, T., Voicu, G. & Cotofana, S., 2017, 2017 IEEE/ACM International Symposium on Nanoscale Architectures. IEEE, p. 13-18 6 p. 8053722

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  34. Memristive devices: Technology, design automation and computing frontiers

    Barbareschi, M., Bosio, A., Du Nguyen, H. A., Hamdioui, S., Traiola, M. & Vatajelu, E. I., 2017, 2017 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS). Danvers: IEEE, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  35. Memristor For Computing: Myth or Reality?

    Hamdioui, S., Kvatinsky, S., Cauwenberghs, G., Xie, L., Wald, N., Joshi, S., Elsayed, H. M., Corporaal, H. & Bertels, K., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 722-731 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  36. Memristor based computation-in-memory architecture for big data

    Hamdioui, S., Taouil, M. & Bertels, K., 2017, IPC No. H03K; G06F, Priority date 7 Jul 2015, Priority No. WO 2017/007318

    Research output: PatentOther research output

  37. Mitigation of sense amplifier degradation using input switching

    Kraak, D., Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Catthoor, F. & Dehaene, W., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 858-863 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  38. Moving workloads to a better place: Optimizing computer architectures for data-intensive applications

    Vermij, E., 2017, 189 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  39. On the Implementation of Computation-in-Memory Parallel Adder

    Du Nguyen, H. A., Xie, L., Taouil, M., Nane, R., Hamdioui, S. & Bertels, K., 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 8, p. 2206 - 2219 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  40. On the Robustness of Memristor Based Logic Gates

    Xie, L., Du Nguyen, H. A., Yu, J., Taouil, M. & Hamdioui, S., 2017, 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Dietrich, M. & Novak, O. (eds.). Piscataway: IEEE, p. 158-163 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  41. Pauli Frames for Quantum Computer Architectures

    Riesebos, L., Fu, X., Varsamopoulos, S., García Almudever, C. & Bertels, K., 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Aitken, R. & Li, Z. (eds.). New York: Association for Computing Machinery (ACM), p. 1-6 76

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  42. Predictive Genome Analysis Using Partial DNA Sequencing Data

    Ahmed, N., Bertels, K. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 119-124 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  43. Pushing Big Data into Accelerators: Can the JVM Saturate Our Hardware?

    Peltenburg, J. W., Hesam, A. & Al-Ars, Z., 2017, High Performance Computing: ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers. Kunkel, J. M., Yokota, R., Taufer, M. & Shalf, J. (eds.). Cham: Springer, p. 220-236 16 p. (Lecture Notes in Computer Science; vol. 10524).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  44. QX: A high-performance quantum computer simulation platform

    Khammassi, N., Ashraf, I., Fu, X., García Almudever, C. & Bertels, K., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 464-469 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  45. Reliability Aware Computing Platforms Design and Lifetime Management

    Cucu Laurenciu, N., 2017, 132 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  46. Reliability issues in RRAM ternary memories affected by variability and aging mechanisms

    Rubio, A., Escudero, M. & Pouyan, P., 2017, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS). Piscataway, NJ: IEEE, p. 90-92 3 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  47. Resistive Random Access Memory Variability and Its Mitigation Schemes

    Pouyan, P., Amat, E., Hamdioui, S. & Rubio, A., 2017, In : Journal of Low Power Electronics. 13, 1, p. 124-134 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  48. Scalable Video Coding

    Choupani, R., 2017, 103 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  49. Scouting Logic: A Novel Memristor-Based Logic Design for Resistive Computing

    Xie, L., Du Nguyen, H. A., Yu, J., Kaichouhi, A., Taouil, M., AlFailakawi, M. & Hamdioui, S., 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). Hübner, M., Reis, R., Stan, M. & Voros, N. (eds.). Piscataway: IEEE, p. 176-181 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  50. SparkGA: A Spark Framework for Cost Effective, Fast and Accurate DNA Analysis at Scale

    Mushtaq, H., Liu, F., Costa, C., Liu, G., Hofstee, P. & Al-Ars, Z., 2017, ACM-BCB '17 Proceedings of the 8th ACM International Conference on Bioinformatics, Computational Biology,and Health Informatics . New York: Association for Computing Machinery (ACM), p. 148-157 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  51. Standards-based tools and services for building lifelong learning pathways

    Sgouropoulou, C., Voyiatzis, I., Koutoumanos, A., Hamdioui, S., Pouyan, P., Comte, M., Prinetto, P., Airò Farulla, G., Ellervee, P., Delgado Kloos, C. & Crespo Garcia, R., 2017, 2017 IEEE Global Engineering Education Conference (EDUCON). Piscataway, NJ: IEEE, p. 1619-1621 3 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  52. State of the Art and Challenges for Test and Reliability of Emerging Non-volatile Resistive Memories

    Vatajelu, E. I., Pouyan, P. & Hamdioui, S., 2017, In : International Journal of Circuit Theory and Applications. p. 1-25 25 p.

    Research output: Contribution to journalArticleScientificpeer-review

  53. Streaming Distributed DNA Sequence Alignment Using Apache Spark

    Mushtaq, H., Ahmed, N. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 188-193 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  54. Test and Reliability of Emerging Non-Volatile Memories

    Hamdioui, S., Pouyan, P., Li, H., Wang, Y., Raychowdhur, A. & Yoon, I., 2017, 2017 IEEE 26th Asian Test Symposium (ATS). O’Conner, L. (ed.). Piscataway, NJ : IEEE, p. 170-178 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  55. The engineering challenges in quantum computing

    García Almudever, C., Lao, L., Fu, X., Khammassi, N., Ashraf, I., Iorga, D., Varsamopoulos, S., Eichler, C., Wallraff, A., Geck, L., Kruth, A., Knoch, J., Bluhm, H. & Bertels, K., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 836-845

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  56. Towards Maximum Utilization of Remained Bandwidth in Defected NoC Links

    Chen, C., Fu, Y. & Cotofana, S., 2017, In : IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 36, 2, p. 285-298 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  57. Towards Real-Time Whisker Tracking in Rodents for Studying Sensorimotor Disorders

    Ma, Y., Ramakrishnan Geethakumari, P., Smaragdos, G., Lindeman, S., Romano, V., Negrello, M., Sourdis, I., Bosman, L. W. J., De Zeeuw, C. I., Al-Ars, Z. & Strydis, C., 2017, 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII). Patt, Y. & Nandy, S. K. (eds.). Red Hook, NY: IEEE, p. 137-145 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  58. Transition Fault Testing for Offline Adaptive Voltage Scaling

    Zandrahimi, M., Debaud, P., Castillejo, A. & Al-Ars, Z., 2017, p. 1-1. 1 p.

    Research output: Contribution to conferencePosterScientific

  59. Using Transition Fault Test Patterns for Cost Effective Offline Performance Estimation

    Zandrahimi, M., Debaud, P., Castillejo, A. & Al-Ars, Z., 2017, 2017 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS). Danvers: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  60. VLIW-Based FPGA Computation Fabric with Streaming Memory Hierarchy for Medical Imaging Applications

    Hoozemans, J., Heij, R., van Straten, J. & Al-Ars, Z., 2017, Applied Reconfigurable Computing: 13th International Symposium, ARC 2017. Wong, S., Beck, A. C., Bertels, K. & Carro, L. (eds.). Cham: Springer, p. 36-43 8 p. (Lecture Notes in Computer Science; vol. 10216)(Theoretical Computer Science and General Issues; vol. 10216).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  61. 2016
  62. A Comparison of Seed-and-Extend Techniques in Modern DNA Read Alignment Algorithms

    Ahmed, N., Bertels, K. & Al-Ars, Z., Dec 2016, 2016 IEEE International Conference on Bioinformatics and Biomedicine (BIBM). Tian, T., Jiang, Q., Liu, Y., Burrage, K., Song, J., Wang, Y., Hu, X., Morishita, S., Zhu, Q. & Wang, G. (eds.). Piscataway, NJ: IEEE, p. 1421-1428 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  63. Maximizing Systolic Array Efficiency to Accelerate the PairHMM Forward Algorithm

    Peltenburg, J., Ren, S. & Al-Ars, Z., Dec 2016, Proceedings - 2016 IEEE International Conference on Bioinformatics and Biomedicine (BIBM). Tian, T., Jiang, Q., Liu, Y., Burrage, K., Song, J., Wang, Y., Hu, X., Morishita, S., Zhu, Q. & Wang, G. (eds.). Piscataway, NJ: IEEE, p. 758-762 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  64. Power-Efficiency Analysis of Accelerated BWA-MEM Implementations on Heterogeneous Computing Platforms

    Houtgast, E. J., Sima, V-M., Marchiori, G., Bertels, K. & Al-Ars, Z., Dec 2016, 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig). Athanas, P., Cumplido, R., Feregrino, C. & Sass, R. (eds.). Danvers, MA: IEEE, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  65. Active Resonator Reset in the Nonlinear Dispersive Regime of Circuit QED

    Bultink, C. C., Rol, M. A., O'Brien, T. E., Fu, X., Dikken, B. C. S., Dickel, C., Vermeulen, R. F. L., De Sterke, J. C., Bruno, A., Schouten, R. N. & DiCarlo, L., 13 Sep 2016, In : Physical Review Applied. 6, 3, p. 1-10 034008.

    Research output: Contribution to journalArticleScientificpeer-review

  66. High-performance, Cost-effective 3D Stacked Wide-Operand Adders

    Voicu, G. R. & Cotofana, S. D., 4 Aug 2016, In : IEEE Transactions on Emerging Topics in Computing. 5, 2, p. 179-192 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  67. Adaptive ILP Control to increase Fault Tolerance for VLIW Processors

    Sartor, A. L., Wong, S. & Beck, A. C. S., Jul 2016, Application-specific Systems, Architectures and Processors (ASAP), 2016 IEEE 27th International Conference on. London, UK: IEEE, p. 9-16 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  68. Communication Driven Mapping of Applications on Multicore Platforms

    Ashraf, I., 28 Apr 2016, 107 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  69. Hybrid NEMS-CMOS Architectures for Ultra Low Power Smart Systems: Architectures for Ultra Low Power Smart Systems

    Enachescu, M., 12 Apr 2016, 155 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  70. Heterogeneous hardware/software acceleration of the BWA-MEM DNA alignment algorithm

    Ahmed, N., Sima, VM., Houtgast, E., Bertels, K. & Al-Ars, Z., 7 Jan 2016, Proceedings of the 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD. Marculescu, D. & Lim, F. (eds.). Piscataway, NJ, USA: IEEE Society, p. 240-246 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  71. A Sparse VLIW Instruction Encoding Scheme Compatible with Generic Binaries

    Brandon, A., Hoozemans, J., van Straten, J., Lorenzon, A., Sartor, A., Schneider Beck Filho, A. C. & Wong, S., Jan 2016. 1 p.

    Research output: Contribution to conferenceAbstractScientific

  72. A Heterogeneous Quantum Computer Architecture

    Fu, X., Riesebos, L., Lao, L., García Almudever, C., Sebastiano, F., Versluis, R., Charbon, E. & Bertels, K., 2016, Proceedings of the ACM International Conference on Computing Frontiers, CF '16. New York: Association for Computing Machinery (ACM), p. 323-330 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  73. A Locality-Aware Hash-Join Algorithm

    Fang, J., Hidders, J., Bertels, K., Lee, J. & Hofstee, P., 2016, p. 1-4. 4 p.

    Research output: Contribution to conferenceAbstractScientific

  74. A Supply Voltage-dependent Variation Aware Reliability Evaluation Model

    Yang, B., Popovici, E., Quille, M. A., Amann, A. & Cotofana, S., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 79-84 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  75. A Survey and Evaluation of FPGA High-Level Synthesis Tools

    Nane, R., Sima, VM., Pilato, C., Choi, J., Fort, B., Canis, A., Chen, YT., Hsiao, H., Brown, S., Ferrandi, F., Anderson, J. & Bertels, K., 2016, In : IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 35, 10, p. 1591-1604 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  76. Alternative architectures toward reliable memristive crossbar memories

    Vourkas, I., Stathis, D., Sirakoulis, G. C. & Hamdioui, S., 2016, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 1, p. 206-217 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  77. An Efficient GPU-Accelerated Implementation of Genomic Short Read Mapping with BWA-MEM

    Houtgast, E., Sima, V., Bertels, K. & Al-Ars, Z., 2016, In : SIGARCH Computer Architecture News. 44, 4, p. 38-43 6 p.

    Research output: Contribution to journalArticleScientific

  78. An Image Processing VLIW Architecture for Real-Time Depth Detection

    Iorga, D., Nane, R., Lu, Y., van Dalen, E. & Bertels, K., 2016, Proceedings - 28th IEEE International Symposium on Computer Architecture and High Performance Computing: SBAC-PAD 2016. Baldassin, A. (ed.). Piscataway: IEEE, p. 158-165 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  79. An approach for digital Circuit Error/Reliability Propagation Analysis based on Conditional Probability

    Yang, B., Grandhi, S., Spagnol, C., Popovici, E. & Cotofana, S., 2016, Proceedings - 27th Irish Signals and Systems Conference. Curran, K. (ed.). Piscataway, NJ: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  80. Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector

    Kritchallo, V., Braithwaite, B., Vermij, E., Bertels, K. & Al-Ars, Z., 2016, Architecture of Computing Systems- ARCS 2016: Proceedings of the 29th International Conference on Architecture of Computing Systems. Hannig, F., Cardoso, J. M. P., Pionteck, T., Fey, D., Schröder-Preikschat, W. & Teich, J. (eds.). Cham: Springer, p. 251-262 12 p. (Lecture Notes in Computer Science; vol. 9367).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  81. Boolean Logic Gate Exploration for Memristor Crossbar

    Xie, L., Du Nguyen, H. A., Taouil, M., Hamdioui, S. & Bertels, K., 2016, Proceedings - 11th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016. Danvers, MA: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  82. Brownian Circuits: Designs

    Lee, J., Peper, F., Cotofana, S., Naruse, M., Ohtsu, M., Kawazoe, T., Takahashi, Y., Shimokawa, T., Kish, L. B. & Kubota, T., 2016, In : International Journal of Unconventional Computing. 12, 5-6, p. 341-362 22 p.

    Research output: Contribution to journalArticleScientificpeer-review

  83. CIM100x: Computation in-Memory Architecture Based on Resistive Devices

    Hamdioui, S., Taouil, M., Du Nguyen, H. A., Haron, A., Xie, L. & Bertels, K., 2016, Proceedings of CNNA 2016: 15th International Workshop on Cellular Nanoscale and their Applications. Berlin: VDE, p. 95-96 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  84. Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation

    Zandrahimi, M., Al-Ars, Z., Debaud, P. & Castillejo, A., 2016, Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. Teich, J. (ed.). Piscataway, NJ: IEEE, p. 1018-1019 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  85. Comparative BTI Analysis for Various Sense Amplifier Designs

    Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Raghavan, P. & Catthoor, F., 2016, Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016. IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  86. Computational Challenges of Next Generation Sequencing Pipelines Using Heterogeneous Systems

    Houtgast, E., Sima, V., Bertels, K. & Al-Ars, Z., 2016, p. 1-4. 4 p.

    Research output: Contribution to conferenceAbstractScientific

  87. CryoCMOS Hardware Technology: A Classical Infrastructure for a Scalable Quantum Computer

    Homulle, H., Visser, S., Patra, B., Ferrari, G., Prati, E., García Almudever, C., Bertels, K., Sebastiano, F. & Charbon, E., 2016, 2016 Proceedings of the ACM International Conference on Computing Frontiers. New York, NY: Association for Computing Machinery (ACM), p. 282-287 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  88. Drift-free video coding for privacy protected video scrambling

    Choupani, R., Wong, S. & Tolun, M., 2016, 10th International Conference on Information, Communications and Signal Processing, ICICS 2015. Piscataway, NJ: IEEE, p. 1-5 5 p. 7459830

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  89. Editorial Note on Memristor Models, Circuits and Architectures

    Sirakoulis, G. C. & Hamdioui, S., 2016, In : International Journal of Unconventional Computing. 12, 4, p. 247-250 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  90. Error Correction Code protected Data Processing Units

    Cucu Laurenciu, N., Gupta, T., Savin, V. & Cotofana, S., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 37-42 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  91. Exploration of Alternative GPU Implementations of the Pair-HMMs Forward Algorithm

    Ren, S., Bertels, K. & Al-Ars, Z., 2016, Proceedings 3rd International Workshop on High Performance Computing on Bioinformatics. p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  92. Flexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing Units

    Nguyen-Ly, T. T., Gupta, T., Pezzin, M., Savin, V., Declercq, D. & Cotofana, S., 2016, Proceedings - 19th Euromicro Conference on Digital System Design (DSD 2016). Kitsos, P. (ed.). Piscataway: IEEE, p. 230-237 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  93. GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing

    Houtgast, E., Sima, V., Bertels, K. & Al-Ars, Z., 2016, Proceedings - 29th International Conference on Architecture of Computing Systems, ARCS 2016. Hannig, F., Cardoso, J. M. P., Pionteck, T., Fey, D., Schröder-Preikschat, W. & Teich, J. (eds.). Springer, p. 130-142 13 p. (Lecture Notes in Computer Science; vol. 9637).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  94. Instruction cache aging mitigation through Instruction Set Encoding

    Gebregiorgis, A., Oboril, F., Tahoori, M. B. & Hamdioui, S., 2016, Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016. Wright, P., Mukhopadhyay, S. & Cline, B. (eds.). Piscataway, NJ: IEEE, p. 325-330 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  95. Non-Volatile Look-up Table Based FPGA Implementations

    Xie, L., Du Nguyen, H. A., Taouil, M., Hamdioui, S., Bertels, K. & Alfailakawi, M., 2016, Proceedings : 11th IEEE International Design & Test Symposium. Tourki, R. (ed.). Piscataway, NJ, USA: IEEE, 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  96. Parallel Matrix Multiplication on Memristor-Based Computation-in-Memory Architecture

    Haron, A., Yu, J., Nane, R., Taouil, M., Hamdioui, S. & Bertels, K., 2016, 2016 International Conference on High Performance Computing & Simulation (HPCS): 14th Annual Meeting. Piscataway: IEEE, p. 759-766 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  97. Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms

    Houtgast, E., Sima, V., Marchiori, G., Bertels, K. & Al-Ars, Z., 2016, p. 1-1. 1 p.

    Research output: Contribution to conferenceAbstractScientific

  98. Power/Performance Trade-Offs in Real-Time SDRAM Command Scheduling

    Goossens, S., Chandrasekar, K., Akesson, B. & Goossens, K., 2016, In : IEEE Transactions on Computers. 65, 6, p. 1882-1895 14 p., 7169527.

    Research output: Contribution to journalArticleScientificpeer-review

  99. Quantification of Sense Amplifier Offset Voltage Degradation due to Zero-and Run-Time Variability

    Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Raghavan, P., Catthoor, F. & Dehaene, W., 2016, Proceedings - IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2016). Taskin, B. & Ghosal, P. (eds.). Los Alamitos, CA: IEEE, p. 725-730 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  100. RRAM Variability and its Mitigation Schemes

    Pouyan, P., Amat, E., Hamdioui, S. & Rubio, A., 2016, 26th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2016. Piscataway, NJ: IEEE, p. 141-146 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  101. Read Path Degradation Analysis in SRAM

    Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Catthoor, F. & Dehaene, W., 2016, Proceedings - 21st IEEE European Test Symposium, ETS 2016. Danvers, MA: IEEE, p. 1-2 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  102. Run-time Phase Prediction for a Reconfigurable VLIW Processor

    Guo, Q., Sartor, A., Brandon, A., Beck, A. C. S., Zhou, X. & Wong, S., 2016, Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. Teich, J. (ed.). Piscataway, NJ: IEEE, p. 1634-1639 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  103. Skeleton-based design and simulation flow for Computation-in-Memory architectures

    Yu, J., Nane, R., Haron, A., Hamdioui, S., Corporaal, H. & Bertels, K., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 165-170 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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