1. 2004
  2. Instruction scheduling for hiding reconfiguration latency

    Panainte, E., Bertels, K. & Vassiliadis, S., 2004, Proceedings of Pro-RISC 2004. Utrecht: Technology Foundation STW, p. 100-105 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  3. Linked faults in random access memories: concept fault models, test algorithms, and industrial results

    Hamdioui, S., Al-Ars, Z., van de Goor, AJ. & Rodgers, M., 2004, In : IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 23, 5, p. 737-757 21 p.

    Research output: Contribution to journalArticleScientificpeer-review

  4. Loading pµ-code: design considerations

    Kuzmanov, GK., Gaydadjiev, GN. & Vassiliadis, S., 2004, Computer systems: architectures, modeling, and simulation. Pimentel, AD. & Vassiliadis, S. (eds.). Berlin: Springer, p. 11-19 9 p. (Lecture Notes in Computer Science; vol. 3133).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  5. Logic-enhanced memory for 3D graphics tile-based rasterizers

    Crisu, D., Cotofana, SD., Vassiliadis, S. & Liuha, P., 2004, The 2004 47th Midwest symposium on Circuits and Systems. Piscataway: IEEE Society, p. 237-240 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  6. Logical effort based design exploration of 64-bit adders using a mixed dynamic-CMOS/Threshold-logic approach

    Celinski, P., Al-Sarawi, S., Abbott, D., Cotofana, SD. & Vassiliadis, S., 2004, Proceedings IEEE Computer Society annual symposium on VLSI; Emerging trends in VLSI systems design. Smailagic, A. & Bayoumi, M. (eds.). Los Alamitos: IEEE, p. 127-132 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  7. Looking for intelligent reconfigurable simulation

    Niculiu, T., Manolescu, A. & Cotofana, SD., 2004, Modelling and simulation 2004. Bobeanu, C. (ed.). Ghent: Eurosis-ETI, p. 5-12 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  8. Low cost and latency embedded 3D graphics reciprocation

    Crisu, D., Vassiliadis, S. & Cotofana, SD., 2004, Proceedings of 2004 IEEE international symposium on circuits and systems. Los Alamitos: IEEE, p. 905-908 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  9. Low delay spread multi-path cancellation for 3G WCDMA

    Iancu, D., Glossner, CJ. & Moudgill, M., 2004, Proceedings of the winter international symposium on Information and communication technologies. Aleksy, M., Bhagyavati, Byrne, S., Corey, KE. & et al (eds.). Dublin: Computer Science Press, p. 428-433 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  10. Matchmaking within multi-agent systems

    Pourebrahimi, B., Bertels, K., Vassiliadis, S. & Sigdel, K., 2004, Proceedings of Pro-RISC 2004. Utrecht: Technology Foundation STW, p. 118-124 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  11. Memory bandwidth requirements of tile-based rendering

    Antochi, I., Juurlink, BHH., Vassiliadis, S. & Liuha, P., 2004, Computer systems: architectures, modeling, and simulation. Pimentel, AD. & Vassiliadis, S. (eds.). Berlin: Springer, p. 323-332 10 p. (Lecture Notes in Computer Science; vol. 3133).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  12. Memory fault modeling trends: a case study

    Hamdioui, S., Wadsworth, R. & delos Reyes, J., 2004, In : Journal of Electronic Testing: theory and applications. 20, p. 245-255 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  13. Modified printed dipole antennas for wireless multi-band communication devices

    Surducan, E., Iancu, D. & Glossner, CJ., 2004, URSI 2004 International symposium on electromagnetic theory. Ghent: International Union of Radio Science, p. 1161-1163 3 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  14. Multimedia reconfigurable hardware design space exploration

    Panainte, E., Bertels, K. & Vassiliadis, S., 2004, Proceedings of the 16th IASTED International conference Parallel and Distributed Computing and Systems. Gonzalez, T. (ed.). Anaheim: ACTA Press, p. 398-403 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  15. Multiple-symbol parallel decoding for variable length codes

    Nikara, J., Vassiliadis, S., Takala, J. & Liuha, P., 2004, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 12, 7, p. 676-685 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  16. On effective computation with nanodevices: a single electron tunnelling technology case study

    Cotofana, SD., Lageweg, CR. & Vassiliadis, S., 2004, CAS 2004 Proceedings 2004 International semiconductor conference. Piscataway: IEEE Society, p. 41-50 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  17. On the performance of multiple OFDM receivers for DVB

    Iancu, D., Ye, H., Abdelilah, Y., Emanoil, S. & Glossner, CJ., 2004, SympoTIC'04 Joint IST workshop on mobile future & symposium on trends in communications, Proceedings. Piscataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  18. Pel reconstruction on FPGA-augmented TriMedia

    Sima, M., Cotofana, SD., Vassiliadis, S., van Eijndhoven, JTJ. & Vissers, KA., 2004, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 12, 6, p. 622-635 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  19. Performance benefits of relaxed memory consistency for process network applications

    Bos, R. & Juurlink, BHH., 2004, Proceedings of Pro-RISC 2004. Utrecht: Technology Foundation STW, p. 10-16 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  20. Performance evaluation of interleaved multithreading in a VLIW architecture

    Suijkerbuijk, S., Stravers, P., Vassiliadis, S. & Juurlink, BHH., 2004, Proceedings of Pro-RISC 2004. Utrecht: Technology Foundation STW, p. 153-160 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  21. Profiling-based state assignment for low power dissipation

    Eggermont, R., Cotofana, SD. & Lageweg, CR., 2004, Proceedings of Pro-RISC 2004. Utrecht: Technology Foundation STW, p. 377-384 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  22. Reduced complexity software receivers for TD-SCDMA downlink

    Shamsunder, S. & Glossner, CJ., 2004, CD Proceedings at the 2004 Global Signal Processing Expo (GSPx) and International Signal Processing Conference (ISPC). Newton: Global Technology Conferences, p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  23. Reducing traffic generated by conflict misses in caches

    de Langen, PJ. & Juurlink, BHH., 2004, 2004 Computing Frontier Conference. New York: Association for Computing Machinery (ACM), p. 235-239 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  24. SCISM vs IA-64 tagging: differences/code density effects

    Gaydadjiev, GN. & Vassiliadis, S., 2004, Euro-Par 2004 Parallel processing. Danelutto, M., Vanneschi, M. & Laforenza, D. (eds.). Berlin: Springer, p. 571-577 7 p. (Lecture Notes in Computer Science; vol. 3149).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  25. SMOKE - Speeding up MPEG-4 operational kernels on Excalibur

    Hofman, J., de Goede, G., Gaydadjiev, GN. & Vassiliadis, S., 2004, Proceedings of Pro-RISC 2004. Utrecht: Technology Foundation, p. 398-402 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  26. SPICE Implementation of a compact single electron tunneling transistor model

    Cheng, J., Hu, C., Cotofana, SD. & Jiang, J., 2004, IEEE-NANO 2004 Proceedings. Piscataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  27. Sandblaster low power DSP

    Glossner, CJ., Chirca, K., Schulte, MJ., Wang, H., Nasimzada, N., Har, D., Wang, S., Hoane, Jr., AJ., Nacer, G., Moudgill, M. & Vassiliadis, S., 2004, Proceedings of the IEEE 2004 custom integrated circuits conference. Piscataway: IEEE Society, p. 575-581 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  28. Sandblaster low-power multithreaded SDR baseband processor

    Glossner, CJ., Schulte, MJ., Moudgill, M., Iancu, D., Jinturkar, S., Raja, T., Nacer, G. & Vassiliadis, S., 2004, Proceedings of the 3rd Workshop on Applications Specific Processors WASP'04. s.l.: s.n., p. 53-58 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  29. Scene management models and overlap tests for tile-based rendering

    Antochi, I., Juurlink, BHH., Vassiliadis, S. & Liuha, P., 2004, Architectures, methods and tools. Selvaraj, H. (ed.). Piscataway: IEEE, p. 424-431 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  30. Single electron encoded latches and flip-flops

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2004, In : IEEE Transactions on Nanotechnology. 3, 2, p. 237-248 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  31. Single electron tunneling based arithmetic computation

    Lageweg, CR., 2004, s.l.: s.n.. 179 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  32. Single-electron tunneling transistor implementation of periodic symmetric functions

    Hu, C., Cotofana, SD. & Jiang, J., 2004, In : IEEE Transactions on Circuits and Systems Part 2: Analog and Digital Signal Processing. 51, 11, p. 593-597 5 p.

    Research output: Contribution to journalArticleScientificpeer-review

  33. Soft faults and the importance of stresses in memory testing

    Al-Ars, Z. & van de Goor, AJ., 2004, Design, automation and test in Europe; Date04 Proceedings. Gielen, G. & Figueras, J. (eds.). Piscataway: IEEE Society, p. 1084-1091 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  34. Software AM radio implementation

    Iancu, D., Glossner, CJ., Ye, H., Abdelilah, Y. & Stanley, S., 2004, In : Journal of Electrical Engineering. 54, 9-10, p. 273-276 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  35. Software centric approach to developing wireless applications

    Jinturkar, S., Ramadurai, V., Shamsunder, S., Moudgill, M. & Glossner, CJ., 2004, Proceedings of the 2004 Software Defined Radio Technical Conference. p. 169-173 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  36. Software rake receiver enhanced GPS system

    Iancu, D., Glossner, CJ., Ye, H., Moudgill, M. & Kotlyar, V., 2004, Proceedings of the 2004 Software Defined Radio Technical Conference. S.l.: s.n., p. 97-105 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  37. Sparse matrix transpose unit

    Stathis, PT., Cheresiz, D., Vassiliadis, S. & Juurlink, BHH., 2004, 18th International Parallel and Distributed Processing Symposium (IPDPS 2004). Los Alamitos: IEEE, p. 1-10 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  38. Sparse matrix vector processing formats

    Stathis, PT., 2004, s.l.: s.n.. 135 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  39. Testing static random access memories - Defects, fault models and test patters

    Hamdioui, S., 2004, Boston: Kluwer Academic Publishers. 240 p.

    Research output: Book/ReportBookScientific

  40. Tests for address decoder delay faults in RAMs due to inter-gate opens

    van de Goor, AJ., Hamdioui, S. & Al-Ars, Z., 2004, Proceedings of the 9th IEEE European Test Symposium. Los Alamitos: IEEE, p. 146-153 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  41. The MOLEN polymorphic processor

    Vassiliadis, S., Wong, JSSM., Gaydadjiev, GN., Bertels, KLM., Kuzmanov, GK. & Moscu Panainte, E., 2004, In : IEEE Transactions on Computers. 53, 11, p. 1363-1375 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  42. The MOLEN processor prototype

    Kuzmanov, GK., Gaydadjiev, GN. & Vassiliadis, S., 2004, IEEE Symposium on field-programmable custom computing machines Proceedings. Arnold, J. & Pocek, KL. (eds.). Los Alamitos: IEEE, p. 296-299 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  43. The Molen Polymorphic Media Processor

    Kuzmanov, GK., 2004, s.l.: s.n.. 174 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  44. The Molen programming paradigm

    Vassiliadis, S., Gaydadjiev, GN., Bertels, K. & Panainte, E., 2004, Computer systems: architectures, modeling, and simulation. Pimentel, AD. & Vassiliadis, S. (eds.). Berlin: Springer, p. 1-11 11 p. (Lecture Notes in Computer Science; vol. 3133).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  45. The Sandbridge SDR communications platform

    Glossner, CJ., Moudgill, M. & Iancu, D., 2004, SympoTIC'04 Joint IST workshop on mobile future & symposium on trends in communications, Proceedings. Piscataway: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  46. The Sandbridge sandblaster communications processor

    Glossner, CJ., Hokenek, E. & Moudgill, M., 2004, Software defined radio; Baseband technologies for 3G handsets and basestations. Tuttlebee, WHW. (ed.). Chichester, England: John Wiley & Sons, p. 129-160 32 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientificpeer-review

  47. The Virtex II Pro [tm] MOLEN processor

    Kuzmanov, GK., Gaydadjiev, GN. & Vassiliadis, S., 2004, Computer systems: architectures, modeling, and simulation. Pimentel, AD. & Vassiliadis, S. (eds.). Berlin: Springer, p. 192-202 11 p. (Lecture Notes in Computer Science; vol. 3133).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  48. The effectiveness of Scan test and its new variants

    van de Goor, AJ., Hamdioui, S. & Al-Ars, Z., 2004, Records of the 2004 International workshop on Memory Technology, Design and Testing MTDT 2004. Titsworth, FM. (ed.). Piscataway: IEEE, p. 26-31 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  49. The p-TriMedia Processor

    Sima, M., 2004, s.n.: Mihai Sima. 194 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  50. The powerPC backend Molen compiler

    Moscu Panainte, E., Bertels, KLM. & Vassiliadis, S., 2004, Field programmable logic and application. Becker, J., Platzner, M. & Vernalde, S. (eds.). Berlin: Springer, p. 434-443 10 p. (Lecture Notes in Computer Science; vol. 3203).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  51. The sandblaster automatic multithreaed vectorizing compiler

    Jinturkar, S., Glossner, CJ., Kotlyar, V. & Moudgill, M., 2004, CD Proceedings at the 2004 Global Signal Processing Expo (GSPx) and International Signal Processing Conference (ISPC). Newton: Global Technology Conferences, p. 1-17 17 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  52. The state-of-art future trends in testing embedded memories

    Hamdioui, S., Gaydadjiev, GN. & van de Goor, AJ., 2004, Records of the 2004 International workshop on Memory Technology, Design and Testing MTDT 2004. Titsworth, FM. (ed.). Piscataway: IEEE, p. 54-59 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  53. The universal multiplier unit

    Calderón, H. & Vassiliadis, S., 2004, Proceedings of Pro-RISC 2004. Utrecht: Technology Foundation STW, p. 341-346 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  54. USB enabled PDP8 computer

    van de Pol, J., Mul, MP., Gaydadjiev, GN. & Vassiliadis, S., 2004, Proceedings of Pro-RISC 2004. Utrecht: Technology Foundation STW, p. 112-117 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  55. Visual data rectangular memory

    Kuzmanov, GK., Gaydadjiev, GN. & Vassiliadis, S., 2004, Euro-Par 2004 Parallel processing. Danelutto, M., Vanneschi, M. & Laforenza, D. (eds.). Berlin: Springer, p. 760-767 8 p. (Lecture Notes in Computer Science; vol. 3149).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  56. 2003
  57. 3D graphics benchmarks for low-power architectures

    Antochi, I., Juurlink, BHH., Vassiliadis, S. & Liuha, P., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 18-22 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  58. A fast CRC update implementation

    Lu, W. & Wong, JSSM., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 113-120 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  59. A fault primitive based analysis of dynamic memory faults

    Hamdioui, S., Gaydadjiev, GN. & van de Goor, AJ., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 84-89 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  60. A fault primitive based analysis of linked faults in RAMs

    Al-Ars, Z., Hamdioui, S. & van de Goor, AJ., 2003, MTDT 2003; Records of the 2003 international workshop on memory technology, design and testing. s.n. (ed.). Piscataway: IEEE Society, p. 33-39 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  61. A flexible simulator of pipelined processors

    Juurlink, BHH., Bertels, KLM. & Li, B., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 483-493 11 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  62. A hierarchical sparse matrix storage format for vector processors

    Stathis, PT., Vassiliadis, S. & Cotofana, SD., 2003, IPDPS 2003; 17th international parallel and distributed processing symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  63. A reconfigurable baseband for 2.5G/3G and beyond

    Glossner, CJ., Iancu, D., Hokenek, E. & Moudgill, M., 2003, WWC'2003 Proceedings; proceedings of 2003 world wireless congress. s.n. (ed.). San Francisco: Delson Group Inc., p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  64. A software-defined communications baseband design

    Glossner, CJ., Iancu, D., Lu, J., Hokenck, E. & Moudgill, M., 2003, In : IEEE Communications Magazine. 41, 1, p. 4-12 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  65. A systematic method for modifying march tests for bit-oriented memories into tests for word-oriented memories

    van de Goor, AJ. & Tlili, IBS., 2003, In : IEEE Transactions on Computers. 52, 10, p. 1320-1330 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  66. A-DELTA: a 64-bit high speed, compact, hybrid dynamic-CMOS/ threshold-logic adder

    Celinski, P., Cotofana, SD. & Abbott, D., 2003, Computational methods in neural modeling; seventh international work-conference on artificial and natural networks, IWANN 2003. Mira, J. & Álvarez, JR. (eds.). Berlin: Springer, p. 73-80 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  67. An investigation into multicasting

    Manolov, N., Gamil, A. & Wong, JSSM., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 523-528 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  68. Analyzing the impact of process variations on DRAM testing using border resistance traces

    Al-Ars, Z. & van de Goor, AJ., 2003, ATS 2003; proceedings of the twelfth Asian test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 24-27 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  69. Arbitrating instructions in an ¿¿-coded CCM

    Kuzmanov, GK. & Vassiliadis, S., 2003, Field-programmable logic and applications; 13th international conference, FPL 2003. Cheung, PYK., Constantinides, GA. & de Sousa, JT. (eds.). Berlin: Springer, p. 81-90 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  70. Area efficient, High speed parallel counter circuits using charge recycling threshold logic

    Celinski, P., Abbott, D. & Cotofana, SD., 2003, ISCAS 2003; Proceedings of the 2003 IEEE international symposium on circuits and systems. Piscataway: IEEE Society, p. 233-236 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  71. Building blocks for electron counting arithmetic

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 222-228 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  72. CMOS implementation of generalized threshold functions

    Padure, MD., Cotofana, SD. & Vassiliadis, S., 2003, Computatational methods in neural modeling: seventh international work-conference on artificial and natural neural networks, IWANN 2003. Mira, J. & Álvarez, JR. (eds.). Berlin: Springer, p. 65-72 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  73. Color space conversion for MPEG decoding on FPGA-augmented trimedia processor

    Sima, M., Vassiliadis, S., Cotofana, SD. & van Eijndhoven, JTJ., 2003, ASAP 2003; Proceedings 2003, the IEEE international conference on application-specific systems, archtectures and processors. Deprettere, E., Bhattacharyya, S., Cavallaro, J., Darte, A. & Thiele, L. (eds.). Piscataway: IEEE Society, p. 250-259 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  74. Combined multiplication and sum-of-squares units

    Schulte, MJ., Marquette, L., Krithivasan, S., Walters, EG. & Glossner, CJ., 2003, ASAP 2003; Proceedings 2003, the IEEE international conference on application-specific systems, archtectures and processors. Deprettere, E., Bhattacharyya, S., Cavallaro, J., Darte, A. & Thiele, L. (eds.). Piscataway: IEEE Society, p. 204-215 12 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  75. Compiling for the molen programming paradigm

    Panainte, E., Bertels, KLM. & Vassiliadis, S., 2003, Field-programmable logic and applications; 13th international conference, FPL 2003. Cheung, PYK., Constantinides, GA. & de Sousa, JT. (eds.). Berlin: Springer, p. 900-910 11 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  76. Compiling for the molen programming paradigm

    Panainte, E., Bertels, KLM. & Vassiliadis, S., 2003, PA3CT; Program acceleration through application and architecture driven code transformations Symposium Proceedings. s.n. (ed.). s.l.: s.n., p. 41-43 3 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  77. Computer graphics and the MOLEN paradigm: a survey

    Calderón, H. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 23-36 14 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  78. Concurrent engineering for intelligent simulation

    Niculiu, T. & Cotofana, SD., 2003, ECEC 2003, tenth European concurrent engineering conference, tenth anniversary conference. Baake, U., Herbst, J. & Graessler, I. (eds.). Gehnt, Belgium: Eurosis, p. 95-99 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  79. Consequences of RAM bitline twisting for test coverage

    Schanstra, I. & van de Goor, AJ., 2003, DATE'03; design automation and test in Europe. Wehn, N. & Verkest, D. (eds.). Piscataway: IEEE Society, p. 1176-1177 2 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  80. D-SAB: a sparse matrix benchmark suite

    Stathis, PT., Vassiliadis, S. & Cotofana, SD., 2003, Parallel computing technologies; seventh international conference, PaCt 2003. Malyshkin, V. (ed.). Berlin: Springer, p. 549-554 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  81. Data cache optimization in multimedia applications

    Molnos, AM., Heijligers, MJM., Cotofana, SD., van Eijndhoven, JTJ. & Mesman, SD., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 529-532 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  82. Design and experimental results of a CMOS flip-flop featuring embedded threshold logic

    Padure, MD., Cotofana, SD. & Vassiliadis, S., 2003, ISCAS 2003; Proceedings of the 2003 IEEE international symposium on circuits and systems. Piscataway: IEEE Society, p. 253-256 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  83. Design tradeoffs for an embedded open GL-compliant hardware rasterizer

    Crisu, D., Cotofana, SD. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. Utrecht: STW, p. 49-55 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  84. Detecting intra-word faults in word-oriented memories

    Hamdioui, S., van de Goor, AJ. & Rodgers, M., 2003, 21th IEEE VLSI test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 241-247 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  85. Dynamic faults in random-access-memories: concept, fault models and tests

    Hamdioui, S., Al-Ars, Z., van de Goor, AJ. & Rodgers, M., 2003, In : Journal of Electronic Testing: theory and applications. 19, 2, p. 195-205 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  86. Efficient filtering with the co-vector processor

    Dang, BL., Engin, N. & Gaydadjiev, GN., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 351-356 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  87. Evaluation methodology for single electron encoded threshold logic gates

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2003, VLSI-SoC 2003; IFIP WG 10.5 international conference on very large scale integration of system-on-chip. Glesner, M., Reis, R., Eveking, H., Mooney, V., Indrusiak, L. & Zipf, P. (eds.). Darmstadt, Germany: Technische Universität Darmstadt, p. 258-262 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  88. FPGA-based variable length decoders

    Nikara, J., Vassiliadis, S., Takala, J. & Liuha, P., 2003, IFIP VLSI-SoC 2003; IFIP WG 10.5 international conference on very large scale integration of system-on-chip. Glesner, M., Eveking, H., Indrusiak, LS., Reis, R., Mooney, V. & Zipf, P. (eds.). Darmstadt, Germany: Technische Universität Darmstadt, p. 437-441 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  89. Future challenges in memory testing

    Hamdioui, S. & Gaydadjiev, GN., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 78-83 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  90. Hardware acceleration of the SRP authentication protocol

    Groen, P., Hämäläinen, P., Juurlink, BHH. & Hämäläinen, T., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 70-77 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  91. Heterogeneous trading agents

    Neuberg, L. & Bertels, KLM., 2003, In : Complexity. 8, 5, p. 28-35 8 p.

    Research output: Contribution to journalArticleScientific

  92. Hierarchical simulated reconfigurable intelligence templates

    Niculiu, T. & Cotofana, SD., 2003, Proceedings of the IASTED international conference on intelligent systems and control. Hamza, MH. (ed.). Anaheim: ACTA Press, p. 39-44 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  93. High-level energy estimation for ARM-based SOCs

    Crisu, D., Cotofana, SD. & Vassiliadis, S., 2003, Third international workshop on systems, architectures, modeling, and simulation. s.n. (ed.). Leiden: SAMOS Initiative, p. 148-153 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  94. Implementation of MPEG-4 on the Philips co vector processor

    An, B., Balakrishnan, S., Cheresiz, D., Juurlink, BHH. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 8-17 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  95. Implementation of a streaming execution unit

    Cheresiz, D., Juurlink, BHH., Vassiliadis, S. & Wijshoff, HAG., 2003, In : Journal of Systems Architecture. 49, p. 599-617 19 p.

    Research output: Contribution to journalArticleScientificpeer-review

  96. Implementing 2D memory buffers for MPEG

    Haverkamp, MB., Kuzmanov, GK. & Vassiliadis, S., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 90-94 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  97. Importance of dynamic faults for new SRAM technologies

    Hamdioui, S., Wadsworth, R., Reyes, JD. & van de Goor, AJ., 2003, ETW 2003; Eighth IEEE European test workshop. s.n. (ed.). Piscataway: IEEE Society, p. 29-34 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  98. Introduction

    van de Goor, AJ., Jha, N. & Gupta, S., 2003, Testing of digital systems. Cambridge: Cambridge University Press, p. 1-25 25 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientificpeer-review

  99. Inverse quantization on FPGA-augmented trimedia

    Sima, M., Vassiliadis, S., Cotofana, SD. & van Eijndhoven, JTJ., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 153-157 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  100. Loading ¿¿-code: design considerations

    Kuzmanov, GK., Gaydadjiev, GN. & Vassiliadis, S., 2003, Third international workshop on systems, architectures, modeling, and simulation. s.n. (ed.). Leiden: SAMOS Initiative, p. 8-11 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  101. Logical and topological testing of scrambled RAMs

    Schanstra, I. & van de Goor, AJ., 2003, LATW 2003 Fourth IEEE Latin-American test workshop. s.n. (ed.). s.l.: s.n., p. 66-71 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  102. Logical effort delay modeling of sense amplifier based charge recycling threshold logic gates

    Celinski, P., Cotofana, SD. & Abbott, D., 2003, Proceedings of ProRISC 2003. s.n. (ed.). Utrecht: STW, p. 43-48 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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