1. 2002
  2. Reconfigurable DWT unit based on lifting

    Kuzmanov, GK., Zafarifar, B., Shrestha, P. & Vassiliadis, S., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 325-333 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  3. Reconfigurable implementation for the AES Algorithm

    Ashruf, CMA., Gaydadjiev, GN. & Vassiliadis, S., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 169-172 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  4. Reconfigurable repetitive padding unit

    Kuzmanov, GK. & Vassiliadis, S., 2002, GLSVLSI '02 Proceedings of the 12th ACM Great Lakes symposium on VLSI. New York: Association for Computing Machinery (ACM), p. 98-103 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  5. Selecting the optimal tile size for low-power tile-based rendering

    Antochi, I., Juurlink, BHH. & Vassiliadis, S., 2002, Proceedings ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  6. SmartCam: Devices for Embedded Intelligent Cameras

    Caarls, W., Jonker, PP. & Corporaal, H., 2002, 3rd PROGRESS Workshop on Embedded Systems, Proceedings (CD-ROM). Schweizer, M. (ed.). Utrecht: STW, p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  7. Static buffered SET based logic gates

    Lageweg, CR., Cotofana, SD. & Vassiliadis, S., 2002, IEEE-NANO 2002; Proceedings of the 2002 2nd IEEE Conference on Nanotechnology. Piscataway, NJ. USA: IEEE Society, p. 491-494 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  8. Symbolic performance prediction of data-dependent parallel programs

    Gautama, H. & van Gemund, AJC., 2002, Computer performance evaluation; Modelling techniques and Tools. Field, T. & et al. (eds.). Berlin: Springer, p. 259-279 21 p. (Lecture Notes in Computer Science; vol. 2324).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  9. Synthetic benchmark generator for the MOLEN processor

    Wong, JSSM., Luo, G. & Cotofana, SD., 2002, Proceedings of ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 561-567 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  10. Test point insertion that facilitates ATPG in reducing test time and data volume

    Geuzebroek, MJ., van Linden, JT. & van de Goor, AJ., 2002, Proceedings International Test Conference 2002. Piscataway, NJ, USA: IEEE Society, p. 138-148 11 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  11. Testing static and dynamic faults in random access memories

    Hamdioui, S., Al-Ars, Z. & van de Goor, AJ., 2002, 20th VLSI Test symposium; Proceedings. Piscataway, NJ, USA: IEEE Society, p. 395-401 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  12. The Delft-Java engine

    Glossner, CJ. & Vassiliadis, S., 2002, Java microarchitectures. Narayanan, V. & Wolckzo, MI. (eds.). Boston: Kluwer Academic Publishers, p. 105-123 17 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientificpeer-review

  13. Threshold logic parallel counters for 32-bit multipliers

    Celinski, P., Cotofana, SD. & Abbott, D., 2002, International symposium on smart materials, Nano-, and micro-smart systems 2002. s.n. (ed.). Belingham: SPIE, p. 205-214 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  14. Through testing of any multiport memory with linear tests

    Hamdioui, S. & van de Goor, AJ., 2002, In : IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 21, 2, p. 217-232 16 p.

    Research output: Contribution to journalArticleScientificpeer-review

  15. Trading efficiency for energy in a texture cache architecture

    Antochi, I., Juurlink, BHH., Cilio, AGM. & Liuha, P., 2002, Proceedings of the 2002 Euromicro conference on Massively-parallel computing systems. Fort Collins, Colorado, USA: The National Technological University Press, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  16. Unstructured agent matchmaking: experiments in timing and fuzzy matching

    Ogston, EFYL. & Vassiliadis, S., 2002, Applied computing 2002: Proceedings of the 2002 ACM symposium on applied computing. New York: Association for Computing Machinery (ACM), p. 300-306 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  17. Wireless SDR solutions: The challenge and promise of next generation handsets

    Glossner, CJ., Hokenek, E. & Moudgill, M., 2002, CDC 2002 Communications Design Conference Proceedings. CMP Media LLC, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  18. Y'UV-to-R'G'B' color space conversion on FPGA-augmented TriMedia-32 processor

    Sima, M., Vassiliadis, S., van Eijndhoven, JTJ. & Cotofana, SD., 2002, Proceeding ProRISC 2002. Utrecht: Dutch Technology Foundation STW, p. 465-471 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  19. 2001
  20. A linear threshold gate implemantation in single electron technology

    Lageweg, C., Cotofana, SD. & Vassiliadis, S., 2001, Proceedings. A Jacobs (ed.). Los Alamitos: IEEE, p. 93-98 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  21. A low power 2D/3D graphics accelerator: The initial design

    Antochi, I., Juurlink, BHH. & Vassiliadis, S., 2001, S.l.: s.n. 18 p.

    Research output: Book/ReportReportProfessional

  22. A low-cost, power-efficient texture cache architecture

    Antochi, I., Juurlink, BHH. & Cilio, AGM., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 250-257 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  23. A mathematical game and its applications to the design of interconnection networks

    Yeh, CH. & Varvarigos, EA., 2001, Proceedings. Los Alamitos: IEEE, p. 21-30 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  24. A new latch-based threshold logic familiy

    Padure, MD., Cotofana, SD., Dan, C., Bodea, M. & Vassiliadis, S., 2001, CAS 2001: proceedings. Piscataway: IEEE Society, p. 531-534 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  25. A padding processor for MPEG-4

    Kuzmanov, G., Vassiliadis, S. & van Eijndhoven, JTJ., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 470-474 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  26. A turnstile based single electron memory element

    Lageweg, C., Cotofana, SD. & Vassiliadis, S., 2001, SAFE 2001: proceedings. Utrecht: STW Technology Foundation, p. 103-108 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  27. Achieving fanout capabilities in single electron encoded logic networks

    Lageweg, C., Cotofana, SD. & Vassiliadis, S., 2001, Proceedings. Vol. 2. Piscataway: IEEE Society, p. 1383-1386 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  28. Agent-based social simulation in markets

    Bertels, KLM. & Boman, M., 2001, In : Electronic Commerce Research. 1, 1-2, p. 149-158 10 p.

    Research output: Contribution to journalArticleScientific

  29. An 8-point IDCT computing resource implemented on a trimedia/CPU64 reconfigurable functional unit

    Sima, M., Cotofana, SD., van Eijndhoven, JTJ. & Vassiliadis, S., 2001, Proceedings. F Karelse (ed.). Utrecht: STW Technology Foundation, p. 211-218 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  30. An analysis of limited wavelength translation in regular all-optical WDM networks

    Sharma, A. & Varvarigos, EA., 2001, In : Journal of Lightwave Technology. 18, 12, p. 1606-1619 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  31. An analysis of oblivious and adaptive routing in optical networks with wavelength translation

    Lang, JP., Sharma, A. & Varvarigos, EA., 2001, In : IEEE - ACM Transactions on Networking. 9, 4, p. 503-517 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  32. An energy-aware architectural exploration tool for ARM-based SOCs

    Crisu, D., Cotofana, SD. & Vassiliadis, S., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 327-337 11 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  33. An energy-aware architectural exploration tool for ARM-based SOCs

    Crisu, D., Cotofana, SD. & Vassiliadis, S., 2001, S.l.: s.n. 24 p.

    Research output: Book/ReportReportProfessional

  34. An implementation of the MPEG-4 ACQ function

    Kuzmanov, G., Vassiliadis, S. & van Eijndhoven, JTJ., 2001, ProRICS 2001: proceedings. Utrecht: STW Technology Foundation, p. 466-469 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  35. An optimization framework for retargetable compilers

    Panainte, E., Athanasiu, I. & Cotofana, SD., 2001, CSCS-13: proceedings. I Dumitrache & C Buiu (eds.). Bucharest: Editura Politehnica, p. 427-432 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  36. Coarse reconfigurable multimedia unit extension

    Wong, JSSM., Cotofana, SD. & Vassiliadis, S., 2001, Proceedings. K Klöckner (ed.). Los Alamitos: IEEE, p. 235-242 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  37. Code positioning for VLIW architectures

    Cilio, AGM. & Corporaal, H., 2001, HPCN Europe 2001: proceedings. G Goos & ... [et Al] (eds.). Berlin: Springer, p. 332-343 12 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  38. Compiler-controlled dynamic instruction dispatch in pipelined processors

    Batten, D., D'Arcy, PG., Glossner, CJ., Jinturkar, S., Thilo, J., Vassiliadis, S. & Wires, K., 2001, Priority date 10 Jul 2001

    Research output: PatentOther research output

  39. Design alternatives for parallel saturating multioperand adders

    Balzola, PI., Schulte, MJ., Ruan, J., Glossner, CJ. & Hokenek, E., 2001, Proceedings 2001 IEEE International conference on Computer design: VLSI in computers & Processors. Piscataway: IEEE Society, p. 172-178 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  40. Designing domain-specific processors

    Arnold, M. & Corporaal, H., 2001, CODES 2001: proceedings. New York: Association for Computing Machinery (ACM), p. 61-66 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  41. Detecting unique faults in multi-port SRAMs

    Hamdioui, S., van de Goor, AJ., Eastwick, D. & Rodgers, M., 2001, Proceedings. DC Young (ed.). Los Alamitos: IEEE, p. 37-42 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  42. Digital to analog conversion performed in single electron technology

    Lageweg, C., Cotofana, SD. & Vassiliadis, S., 2001, IEEE-NANO 2001: proceedings. Piscataway: IEEE Society, p. 105-110 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  43. Editorship:

    Vassiliadis, S. & ... [et Al], ., 2001, Euro-Par 2001: proceedings. Berlin: Springer, p. -

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  44. Embedded processor design using transport triggered architectures

    Corporaal, H., 2001, Proceedings. RHJM Otten (ed.). S.l.: IEEE Society, p. 25-34 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  45. Facilitating automatic test pattern generators using test point insertion

    Geuzebroek, MJ., van de Goor Ph D, AJ. & van Linden, JT., 2001, Global Semiconductor Manufacturing Technology. Business Briefing, p. 149-152

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientific

  46. Hierarchical intelligent simulation

    Niculiu, T. & Cotofana, SD., 2001, ESM'2001: proceedings. San Diego: Society for Computer Simulation International, p. 243-246 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  47. Impact of spot defects on fault modeling and tests in dual-port memories

    Hamdioui, S., van de Goor, AJ., Eastwick, D. & Rodgers, M., 2001, ETW 2001: proceedings. S.l.: s.n., p. 19-21 3 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  48. Implementation and evaluation of the complex streamed instruction set

    Juurlink, BHH., Tcheressiz, D., Vassiliadis, S. & Wijshoff, H., 2001, PACT 2001: proceedings. AD Williams (ed.). Los Alamitos: IEEE, p. 73-82 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  49. Implementation of encryption algorithms on transport triggered architectures

    Hamalainen, P., Hannikainen, M., Hamalainen, T., Corporaal, H. & Saarinen, J., 2001, ISCAS 2001 The 2001 IEEE International symposium on circuits and systems. Piscataway, NJ, USA: IEEE Society, p. 726-730 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  50. Local distributed agent matchmaking

    Ogston, E. & Vassiliadis, S., 2001, Cooperative information systems. C Batini & ... [et Al] (eds.). Berlin: Springer, p. 67-79

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientificpeer-review

  51. Logic BIST technology evaluation: an industrial case study

    Feige, C. & Geuzebroek, MJ., 2001, ETW 2001: Informal Digest. S.l.: s.n., p. 333-340 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  52. Low-power techniques and 2D/3D graphics architectures

    Crisu, D., Antochi, I., Cotofana, SD., Juurlink, BHH. & Vassiliadis, S., 2001, S.l.: s.n. 125 p.

    Research output: Book/ReportReportProfessional

  53. MPEG macroblock parsing and Pel reconstruction on an FPGA-augmented TriMedia processor

    Sima, M., Cotofana, SD., Vassiliadis, S., van Eijndhoven, JTJ. & Vissers, K., 2001, 2001 IEEE International conference on Computer design: VLSI in computers & processors. Piscataway, NJ, USA: IEEE Society, p. 425-431 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  54. MPEG-4 and the new multimedia architectural challenges

    Vassiliadis, S., Kuzmanov, GK. & Wong, JSSM., 2001, 15th International conference on Systems for automation of engineering and research (SAER-2001). Sofia, Bulgaria: SAER Forum Group, p. 24-32 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  55. Matchmaking among minimal agents without a facilitator

    Ogston, E. & Vassiliadis, S., 2001, Proceedings. JP Müller (ed.). New York: Association for Computing Machinery (ACM), p. 608-615 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  56. Multi-hierarchical learning-based co-simulation

    Niculiu, T. & Cotofana, SD., 2001, Proceedings. MH Hamza (ed.). Annaheim: iASTED, p. 24-29 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  57. Multihierarchical intelligent simulation

    Niculiu, T., Aktouf, C. & Cotofana, SD., 2001, In : Polytechnical University of Bucharest. Scientific Bulletin. Series C: Electrical Engineering and Computer Science. 63, 4, p. 15-24 10 p.

    Research output: Contribution to journalArticleScientific

  58. Network processors: issues and prospectives

    Vassiliadis, S., Wong, JSSM. & Cotofana, SD., 2001, PDPTA'2001: proceedings. Vol. 4. S.l.: CSREA, p. 1827-1833 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  59. On chaos and neural networks: the backpropagation paradigm

    Bertels, KLM., Neuberg, L., Vassiliadis, S. & Pechanek, DG., 2001, In : Artificial Intelligence Review: an international science and engineering journal. 15, 3, p. 165-187 23 p.

    Research output: Contribution to journalArticleScientificpeer-review

  60. Performance evaluation for a quasi-synchronous packet radio network (QSPNET)

    Banerjee, A., Iltis, RA. & Varvarigos, EA., 2001, In : IEEE - ACM Transactions on Networking. 9, 5, p. 567-578 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  61. Performance of the complex streamed instruction set on image processing kernels

    Tcheressiz, D., Juurlink, BHH., Vassiliadis, S. & Wijshoff, H., 2001, Euro-Par 2001: proceedings. R Sakellariou & ... [et Al] (eds.). Berlin: Springer, p. 678-686 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  62. Performance relevant issues for parallel computation models

    Juurlink, BHH. & Rieping, I., 2001, PDPTA'2001: proceedings. Vol 4. S.l.: CSREA, p. 1841-1847 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  63. RACE: A software-based fault tolerance scheme for systematically transforming ordinary algorithms to robust algorithms

    Yeh, C-H., Parhami, B., Varvarigos, EA. & Varvarigou, TA., 2001, Proceedings 15th international parallel and distributed processing symposium. Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  64. Realistic fault models and test procedure for multi-port SRAMs

    Hamdioui, S., van de Goor, AJ., Eastwick, D. & Rodgers, M., 2001, Proceedings. Los Alamitos: IEEE, p. 65-72 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  65. Reservation-based session routing for broadband communication networks with strict QoS requirements

    Yeh, CH., Varvarigos, EA., Bertsekas, D. & Mouftah, H., 2001, ICOIN the 15th: proceedings. Los Alamitos: IEEE, p. 593-600 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  66. SAD implementation in FPGA hardware

    Wong, JSSM., Vassiliadis, S. & Cotofana, SD., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 738-742 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  67. Single electron encoded logic circuits

    Lageweg, C., Cotofana, SD. & Vassiliadis, S., 2001, SAFE 2001: proceedings. Utrecht: STW Technology Foundation, p. 96-102 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  68. Sparse matrix vector multiplication evaluation using the BBCS scheme

    Stathis, P., Cotofana, SD. & Vassiliadis, S., 2001, Proceedings. Vol. 1. Y Manolopoulos & S Evripidou (eds.). S.l.: s.n., p. 40-49 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  69. Testing multi-port memories: theory and practice

    Hamdioui, S., 2001, S.l.: s.n.. 219 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  70. The MOLEN þµ-coded processor

    Vassiliadis, S., Wong, JSSM. & Cotofana, SD., 2001, Field-progammable logic and applications. G Goos & ... [et Al] (eds.). Berlin: Springer, p. 275-285

    Research output: Chapter in Book/Conference proceedings/Edited volumeChapterScientificpeer-review

  71. Transposition mechanism for sparse matrices on vector processors

    Stathis, P., Vassiliadis, S. & Cotofana, SD., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 641-645 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  72. Variable length decoder implemented on a TriMedia/CPU64 reconfigurable functional unit

    Sima, M., Cotofana, SD., Vassiliadis, S. & van Eijndhoven, JTJ., 2001, ProRISC 2001: proceedings. Utrecht: STW Technology Foundation, p. 605-610 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  73. 2000
  74. A library of static and dynamic communication algorithms for parallel computation

    Varvarigos, EA., 2000, In : Telecommunication Systems: modeling, analysis, dssign and management. 13, p. 3-20 18 p.

    Research output: Contribution to journalArticleScientific

  75. A look inside the learning process of neural networks

    Bertels, KLM., Neuberg, L., Vassiliadis, S. & Pechanek, GG., 2000, In : Complexity. 5, 6, p. 34-38 5 p.

    Research output: Contribution to journalArticleScientificpeer-review

  76. A taxonomy of custom computing machines

    Sima, M., Vassiliadis, S., Cotofana, SD., van Eijndhoven, JTJ. & Vissers, K., 2000, Proceedings. JP Veen (ed.). Utrecht: STW Technology Foundation, p. 71-77 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  77. A virtual circuit deflection protocol

    Varvarigos, EA. & Lang, JP., 2000, In : IEEE - ACM Transactions on Networking. 7, 3, p. 335-349 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  78. An experimental analysis of spot defects in SRAMs: realistic fault models and test

    Hamdioui, S. & van de Goor Ph D, AJ., 2000, Proceedings of the ninth Asian test symposium. DC Young (ed.). Piscataway: IEEE Society, p. 131-138 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  79. Array based structure loop transformations for cache miss reduction

    Stanca, VM., Corporaal, H., Cotofana, SD. & Vassiliadis, S., 2000, Proceedings. MH Hamza (ed.). Annaheim: iASTED, p. 278-284 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  80. Array processor communication architecture with broadcast instructions

    Pechanek, GG., Vassiliadis, S., Glossner, CJ. & Larsen, LD., 2000, Priority date 26 Jul 2000

    Research output: PatentOther research output

  81. Automated design of an ASIP for image processing applications

    Schot, HJM. & Corporaal, H., 2000, In: A Bode, ...[et al.] (eds): Euro-Par 2000 parallel processing [Lecture notes in computer science 1900]. Berlin: Springer, p. 1105-1109 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  82. Automatic SIMD parallelization of embedded applications based on pattern recognition

    Manniesing, R., Karkowski, I. & Corporaal, H., 2000, In: A Bode, ...[et al.] (eds.): Euro-Par 2000 parallel processing [Lecture notes in computer science 1900]. Berlin: Springer, p. 349-356 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  83. BBCS based sparse matrix-vector multiplication: initial evaluation

    Vassiliadis, S., Cotofana, SD. & Stathis, P., 2000, Proceedings. M Deville & R Owens (eds.). New Brunswick: IMACS, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  84. Block based compression storage expected performance

    Vassiliadis, S., Cotofana, SD. & Stathis, P., 2000, HPC 2000: proceeding. NJ Dimopoulos & KF Li (eds.). S.l.: Kluwer Academic Publishers, p. 389-406 18 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  85. Branch instruction processor and method

    Blaner, B., Jeremiah, TL., Vassiliadis, S. & Williams, PG., 2000, Priority date 19 May 1999

    Research output: PatentOther research output

  86. Compiler controlled dynamic scheduling of program instructions

    D'Arcy, PG., Jinturkar, S., Glossner, CJ. & Vassiliadis, S., 2000, Priority date 23 Jun 1999

    Research output: PatentOther research output

  87. Complex streamed instructions: introduction and initial evaluation

    Vassiliadis, S., Juurlink, BHH. & Hakkennes, EA., 2000, Proceedings, vol. 1. Los Alamitos: IEEE, p. 400-408 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  88. Compounding preprocessor for cache

    Vassiliadis, S. & Blaner, B., 2000, Priority date 2 Feb 2000

    Research output: PatentOther research output

  89. Counter based superscalar instruction issuing

    Cotofana, SD., Juurlink, BHH. & Vassiliadis, S., 2000, Proceedings, vol. 1. Los Alamitos: IEEE, p. 307-315 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  90. Distributed processing array with component processors performing customized interpretation of instructions

    Pechanek, GG., Larsen, LD., Glossner, CJ. & Vassiliadis, S., 2000, Priority date 3 Oct 2000

    Research output: PatentOther research output

  91. Elementary function generators for neural-network emulators

    Vassiliadis, S., Zhang, M. & Delgado-Frias, JG., 2000, In : IEEE Transactions on Neural Networks. 11, 6, p. 1438-1449 12 p.

    Research output: Contribution to journalArticleScientific

  92. Embedded processor design using transport triggered architectures

    Corporaal, H., 2000, SPECLOG'2000 proceedings. R Creutzburg & K Egiazarian (eds.). Monistamo, Finland: TTKK, p. 469-469

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  93. Garbage collection for the Delft Java Processor

    Berlea, A., Cotofana, SD., Athanasiu, I., Glossner, CJ. & Vassiliadis, S., 2000, Proceedings. MH Hamza (ed.). Annaheim: iASTED, p. 232-238 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  94. General-purpose Huffman encoding extension

    Wong, JSSM., Cotofana, SD. & Vassiliadis, S., 2000, ITCC 2000. Los Alamitos: IEEE, p. 158-163 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  95. Hashed addressed caches for embedded pointer based codes

    Stanca, VM., Vassiliadis, S., Cotofana, SD. & Corporaal, H., 2000, In: A Bode, ...(et al.] (eds.): Euro-Par 2000 parallel processing [Lecture notes in computer science 1900]. Berlin: Springer, p. 956-968 13 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  96. Hierarchical approach for hardware/software systems

    Niculiu, T., Cotofana, SD. & Manolescu, A., 2000, CAS 2000 proceedings. Vol. 1. 2000 international semicondutor conference 23rd edition. D Dascalu (ed.). Piscataway: IEEE Society, p. 223-226 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  97. Hierarchical interfaces for hardware/software systems

    Niculiu, T., Aktouf, C. & Cotofana, SD., 2000, 14th European simulation multiconference. D Landeghem, V. (ed.). San Diego: Society for Computer Simulation International, p. 647-654 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  98. JAVA signal processing: FFTs with bitecodes

    Glossner, CJ., Thilo, J. & Vassiliadis, S., 2000, In : Concurrency: Practice and Experience. 10, 11-13, p. 1173-1178 6 p.

    Research output: Contribution to journalArticleScientific

  99. Link-time effective whole-program optimizations

    Cilio, AGM. & Corporaal, H., 2000, In : Future Generation Computer Systems: the international journal of grid computing: theory, methods and applications. 16, p. 503-511 9 p.

    Research output: Contribution to journalArticleScientific

  100. March tests for realistic faults in two-port memories

    Hamdioui, S. & van de Goor Ph D, AJ., 2000, Records of the 2000 IEEE international workshop on memory technology, design and testing. R Rajsuman & T Wik (eds.). Los Alamitos: IEEE, p. 73-78 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  101. Massively parallel multiple-folded clustered processor mesh array

    Pechanek, GG., Vassiliadis, S. & Delgado-Frias, JG., 2000, Priority date 21 Mar 2000

    Research output: PatentOther research output

  102. Method for processing instructions for parrallel execution including storing instruction sequences along with compounding information in cache

    Blaner, B. & Vassiliadis, S., 2000, Priority date 22 Feb 2000

    Research output: PatentOther research output

  103. Multi-cost routing in Max-Min fair share networks

    Gutierrez, FJ., Varvarigos, EA. & Vassiliadis, S., 2000, Proceedings. Vol. 2. S.l.: s.n., p. 1294-1304 11 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

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