1. 2016
  2. Run-time Phase Prediction for a Reconfigurable VLIW Processor

    Guo, Q., Sartor, A., Brandon, A., Beck, A. C. S., Zhou, X. & Wong, S., 2016, Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. Teich, J. (ed.). Piscataway, NJ: IEEE, p. 1634-1639 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. Skeleton-based design and simulation flow for Computation-in-Memory architectures

    Yu, J., Nane, R., Haron, A., Hamdioui, S., Corporaal, H. & Bertels, K., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 165-170 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  4. Synthesizing HDL to Memristor Technology: A Generic Framework

    Du Nguyen, H. A., Xie, L., Taouil, M., Hamdioui, S. & Bertels, K., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 43-48 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  5. TFET NDR Skewed Inverter based Sensing Method

    Gupta, N., Makosiej, A., Vladimirescu, A., Amara, A., Cotofana, S. & Anghel, C., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 13-14 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  6. Testing open defects in memristor-based memories

    Hamdioui, S., Taouil, M. & Haron, NZB., 2016, In : IEEE Transactions on Computers. 64, 1, p. 247-259 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  7. The Fidelity Slider: A User-Defined Method to Trade off Accuracy for Performance in Canny Edge Detector

    Kritchallo, V., Vermij, E., Bertels, K. & Al-Ars, Z., 2016, 11th HiPEAC conference. p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  8. Towards Robust Implementation of Memristor Crossbar Logic Circuits

    Xie, L., 2016, 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME). Piscataway., NJ: IEEE, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. Ultra-low leakage SRAM design with sub-32 nm tunnel FETs for low standby power applications

    Makosiej, A., Gupta, N., Vakul, N., Vladimirescu, A., Cotofana, S., Mahapatra, S., Amara, A. & Anghel, C., 2016, In : Micro and Nano Letters. 11, 12, p. 828-831 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  10. Using wavelet transform self-similarity for effective multiple description video coding

    Choupani, R., Wong, S. & Tolun, M., 2016, 10th International Conference on Information, Communications and Signal Processing, ICICS 2015. Piscataway, NJ: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. 2015
  12. An FPGA-based systolic array to accelerate the BWA-MEM genomic mapping algorithm

    Houtgast, E., Sima, VM., Bertels, K. & Al-Ars, Z., 28 Dec 2015, Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS XV. Soudris, D. & Carro, L. (eds.). Piscataway, NJ, USA: IEEE Society, p. 221-227 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  13. A sparse VLIW instruction encoding scheme compatible with generic binaries

    Brandon, A., Hoozemans, J., Van Straten, J., Lorenzon, A., Sartor, A., Schneider Beck, A. C. & Wong, S., 7 Dec 2015, 2015 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015. Institute of Electrical and Electronics Engineers (IEEE), 7 p. 7393361

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  14. Multiple contexts in a multi-ported VLIW register file implementation

    Hoozemans, J., Johansen, J., Van Straten, J., Brandon, A. & Wong, S., 7 Dec 2015, 2015 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015. Institute of Electrical and Electronics Engineers (IEEE), 6 p. 7393329

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  15. Memristor Based Computation-in-Memory Architecture for Data-Intensive Applications

    Hamdioui, S., Xie, L., Du Nguyen, H. A., Taouil, M., Bertels, K., Corporaal, H., Jiao, H., Catthoor, F., Wouters, D., Eike, L. & van Lunteren, J., Mar 2015, Proceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition. Nebel, W. (ed.). Piscataway, NJ: IEEE, p. 1718-1725 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  16. A DfT architecture and tool flow for 3-D SICs with test data compression, embedded cores, and multiple towers

    Papameletis, C., Keller, B., Chickermane, V., Hamdioui, S. & Marinissen, EJ., 2015, In : IEEE Design & Test. 32, 4, p. 40-48 9 p.

    Research output: Contribution to journalArticleProfessional

  17. A shared polyhedral cache for 3D wide-I/O multi-core computing platforms

    Lefter, M., Voicu, GR. & Cotofana, SD., 2015, Proceedings - 2015 IEEE International Symposium on Circuits and Systems. de Medeiras Silva, M. (ed.). Piscataway, NJ, USA: IEEE Society, p. 425-428 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  18. Accelerating complex brain-model simulations on GPU platforms

    Nguyen, HAD., Al-Ars, Z., Smaragdos, G. & Strydis, C., 2015, Proceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition. Nebel, W. (ed.). Piscataway, NJ, USA: IEEE Society, p. 974-979 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  19. Aging mitigation in memory arrays using self-controlled bit-flipping technique

    Gebregiorgis, A., Ebrahimi, M., Kiamehr, S., Oboril, F., Hamdioui, S. & Tahoori, MB., 2015, Proceedings - 20th Asia and South Pacific Design Automation Conference. Uchiyama, K. (ed.). Piscataway, NJ, USA: IEEE Society, p. 231-236 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  20. Analysis of RNAseq datasets from a comparative infectious disease zebrafish model using GeneTiles bioinformatics

    Veneman, WJ., de Sonneville, J., van der Kolk, KJ., Ordas, A., Al-Ars, Z., Meijer, AH. & Spaink, HP., 2015, In : Immunogenetics. 67, 3, p. 135-147 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  21. Asynchronous Charge Sharing Power Consistent Montgomery Multiplier

    Chen, J., Tisserand, A., Popovici, E. & Cotofana, SD., 2015, Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems. Jones, IW. & Sparso, J. (eds.). Piscataway: IEEE Society, p. 132-138 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  22. BTI analysis of SRAM write driver

    Agbo, IO., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S. & Catthoor, F., 2015, Proceedings of the 10th International Design and Test Symposium, IDT 2015. Kurdahi, F., Mir, S. & Yu, MO. (eds.). Piscataway: IEEE Society, p. 100-105 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  23. Beamforming in sparse, random, 3D array antennas with fluctuating element locations

    Bentum, M. J., Lager, I. E., Bosma, S., Bruinsma, W. P. & Hes, R., 2015, 2015 9th European Conference on Antennas and Propagation, EuCAP 2015. Piscataway, NJ: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  24. Calculation of worst-case execution time for multicore processors using deterministic execution

    Mushtaq, H., Al-Ars, Z. & Bertels, K., 2015, Proceedings of the 2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS. Reis, R. & Nunes de Lima, R. (eds.). Piscataway: IEEE Society, p. 33-39 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  25. Challenges in exascale radio astronomy: Can the SKA ride the technologe wave?

    Vermij, E., Fiorin, L., Jongerius, R., Hagleitner, C. & Bertels, KLM., 2015, In : International Journal of High Performance Computing Applications. 29, 1, p. 37-50 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  26. Cluster-based Apache Spark implementation of the GATK DNA analysis pipeline

    Mushtaq, H. & Al-Ars, Z., 2015, Proceedings of the International Conference on Bioinformatics and Biomedicine. Huan, J., Miyano, S. & Shehu, A. (eds.). Piscataway: IEEE Society, p. 1471-1477 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  27. Communication-Aware Parallelization Strategies for High Performance Applications

    Ashraf, I., Bertels, K., Khammassi, N. & le Lann, JC., 2015, Proceedings of the IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015. Mohanty, SP. & Belleville, M. (eds.). Piscataway: IEEE Society, p. 539-444 94 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  28. Comparative analysis of RD and Atomistic trap-based BTI models on SRAM Sense Amplifier

    Agbo, IO., Taouil, M., Hamdioui, S., Cosemans, S., Weckx, P., Raghavan, P. & Catthoor, F., 2015, Proceedings - 10th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2015. Casola, V. (ed.). Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  29. Computation-in-memory based parallel adder

    Du Nguyen, HA., Xie, L., Taouil, M., Nane, R., Hamdioui, S. & Bertels, K., 2015, Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH. Moritz, CA. & Rahman, M. (eds.). Piscataway: IEEE Society, p. 57-62 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  30. Dependable multicore architectures at nanoscale: The view from Europe

    Ottavi, M., Pontarelli, S., Gizopoulos, D., Paschalis, A., Bolchini, C., Michael, MK., Anghel, L., Tahoori, M., Reviriego, P., Bringmann, O., Izosimov, V., Manhaeve, H., Strydis, C. & Hamdioui, S., 2015, In : IEEE Design & Test of Computers. 32, 2, p. 17-28 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  31. Design dependent SRAM PUF robustness analysis

    Cortez, AMMO., Hamdioui, S. & Ishihara, R., 2015, Proceedings - 16th IEEE Latin-American Test Symposium. Champac, V. & Zorian, Y. (eds.). Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  32. Dynamic bitstream length scaling energy effective stochastic LDPC decoding

    Marconi, T. & Cotofana, SD., 2015, Proceedings of the 25th Great Lakes Symposium on VLSI, GLSVLSI 2015. Coskun, AK. & Margala, M. (eds.). New York: Association for Computing Machinery (ACM), p. 245-248 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  33. Enabling vertical wormhole switching in 3D NoC-Bus hybrid systems

    Chen, C., Enachescu, M. & Cotofana, SD., 2015, Proceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition. Nebel, W. (ed.). Piscataway, NJ, USA: IEEE Society, p. 507-512 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  34. FPGA acceleration of the pair-HMMs forward algorithm for DNA sequence analysis

    Ren, S., Sima, V-M. & Al-Ars, Z., 2015, Proceedings - 2015 IEEE International Conference on Bioinformatics and Biomedicine. Huan, J. L., Miyano, S. & Shehu, A. (eds.). Danvers, MA: IEEE, p. 1465-1470 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  35. FPGA-accelerated Monte-Carlo integration using stratified sampling and Brownian bridges

    de Jong, M., Sima, VM., Bertels, KLM. & Thomas, D., 2015, Proceedings 2014 International Conference on Field Programmable Technologies. Kwok-Hay So, H. & Ma et al, Y. (eds.). Piscataway, NJ, USA: IEEE Society, p. -

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  36. Fast boolean logic mapped on memristor crossbar

    Xie, L., Du Nguyen, HA., Taouil, M., Hamdioui, S. & Bertels, K., 2015, Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD. Ozev, S. & Chung, SW. (eds.). Piscataway: IEEE Society, p. 335-342 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  37. Hierarchical SNR scalable video coding with adaptive quantization for reduced drift error

    Choupani, R., Wong, S. & Tolun, M., 2015, Proceedings - 10th International Conference on Computer Vision Theory and Applications. Imai, F., Braz, J. & Battiato, S. (eds.). Lisbon, Portugal: SciTePress, p. 117-123 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  38. Integral impact of BTI and voltage temperature variation on SRAM sense amplifier

    Agbo, IO., Taouil, M., Hamdioui, S., Kukner, H., Weckx, P., Raghavan, P. & Catthoor, F., 2015, Proceedings - 33rd IEEE VLSI Test Symposium. Thibeault, C. & Anghel, L. (eds.). Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  39. Intelligent voltage ramp-up time adaptation for temperature noise reduction on memory-based PUF systems

    Cortez, AMMO., Hamdioui, S., Kaichouhi, A., van der Leest, V., Maes, R. & Schrijen, GJ., 2015, In : IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 34, 7, p. 1162-1175 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  40. Interconnect networks for memristor crossbar

    Xie, L., Du Nguyen, HA., Taouil, M., Hamdioui, S. & Bertels, K., 2015, Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH. Moritz, CA. & Rahman, M. (eds.). Piscataway: IEEE Society, p. 124-129 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  41. Low cost and energy, thermal noise driven, probability modulated random number generator

    Cucu Laurenciu, N. & Cotofana, SD., 2015, Proceedings - 2015 IEEE International Symposium on Circuits and Systems. de Medeiras Silva, M. (ed.). Piscataway, NJ, USA: IEEE Society, p. 2724-2727 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  42. Low-Cost Software Control-Flow Error Recovery

    Nazarian, G., Nane, R. & Gaydadjiev, GN., 2015, Proceedings of the Euromicro Conference on Digital System Design. Canas Ferreira, J. & Kitsos, P. (eds.). Piscataway: IEEE Society, p. 510-517 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  43. Low-power receive electronics for a miniature real-time 3D ultrasound probe

    Pertijs, MAP., Raghunathan, SB., Chen, C., Chang, ZY., Shabanimotlagh, M., Noothout, EC., Blaak, S., Ponte, J., Prins, C., Bosch, H., Verweij, MD. & de Jong, N., 2015, Proceedings of the 6th IEEE International Workshop on Advances in Sensors and Interfaces. s.n. (ed.). Piscataway: IEEE Society, p. 235-238 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  44. Memory profiling for intra-application data-communication quantification: A survey

    Ashraf, I., Taouil, M. & Bertels, K., 2015, Proceedings of the 10th International Design and Test Symposium. Kurdahi, F., Mir, S. & Yu, MO. (eds.). Piscataway: IEEE Society, p. 32-37 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  45. Memristor: the enabler of computation-in-memory architecture for big-data

    Hamdioui, S., Taouil, M., Du Nguyen, HA., Haron, A., Xie, L. & Bertels, K., 2015, International Conference on Memristive Systems, MEMRISYS. s.n. (ed.). Piscataway: IEEE Society, p. 1-3 3 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  46. Multi-Domain SystemC model of 128-channel time-multiplexed neural interface front-end

    Wirianto, K., Zjajo, A., Galuzzi, C. & van Leuken, TGRM., 2015, Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS XV. Soudris, D. & Carro, L. (eds.). Piscataway, NJ, USA: IEEE Society, p. 295-302 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  47. Noise analysis of programmable gain analog to digital converter for integrated neural implant front end

    Zjajo, A., Galuzzi, C. & van Leuken, TGRM., 2015, Proceedings - 8th International Conference on Biomedical Electronics and Devices, Part of 8th International Joint Conference on Biomedical Engineering Systems and Technologies, BIOSTEC 2015. Cliquet, A., Fred, A., Gamboa, H. & Elias, D. (eds.). Barcelona: SciTePress, p. 5-12 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  48. On resistive open defect detection in DRAMs: The charge accumulation effect

    Sfikas, Y., Tsiatouhas, YE., Taouil, M. & Hamdioui, S., 2015, Proceedings - 20th IEEE European Test Symposium. Miclea, L. & Prinetto, P. (eds.). Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  49. Post-bond interconnect test and diagnosis for 3-D memory stacked on logic

    Taouil, M. & Hamdioui, S., 2015, In : IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 34, 11, p. 1860-1872 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  50. SW-based transparent in-field memory testing

    Bernardi, P., Ciganda, L., Reorda, MS. & Hamdioui, S., 2015, Proceedings - 16th IEEE Latin-American Test Symposium. Champac, V. & Zorian, Y. (eds.). Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  51. Sequential power per area optimization of multichannel neural recording interface based on dual quadratic programming

    Zjajo, A., Galuzzi, C. & van Leuken, TGRM., 2015, Proceedings of the 7th International IEEE/EMBS Conference on Neural Engineering. Guiraud, D., Lovell, N., Stieglitz, T., Azevedo-Coste, C., Gao, S., Akay, M., Durand, M., He, B., Micera, S. & Tong, S. (eds.). Piscataway, NJ, USA: IEEE Society, p. 9-12 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  52. Stochastic noise analysis of neural interface front end

    Zjajo, A., Galuzzi, C. & van Leuken, TGRM., 2015, Proceedings - 2015 IEEE International Symposium on Circuits and Systems. de Medeiras Silva, M. (ed.). Piscataway, NJ, USA: IEEE Society, p. 169-172 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  53. Transmission channel noise aware energy effective LDPC decoding

    Marconi, T., Spagnol, C., Popovici, E. & Cotofana, SD., 2015, 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration: Revised and extended selected papers. Sanz-Pascual, MT., Claesen, L., Reis, R. & Sarmiento-Reyes, A. (eds.). Cham: Springer, p. 198-219 22 p. (IFIP Advances in Information and Communication Technologies; vol. 464).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  54. Yield Improvement for 3D wafer-to-wafer stacked ICs using wafer matching

    Taouil, M., Hamdioui, S. & Marinissen, EJ., 2015, In : ACM Transactions on Design Automation of Electronic Systems. 20, 2, p. 1-23 23 p.

    Research output: Contribution to journalArticleScientificpeer-review

  55. using VLIW softcore processors for image processing applications

    Hoozemans, JJ., Wong, S. & Al-Ars, Z., 2015, Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS XV. Soudris, D. & Carro, L. (eds.). Piscataway: IEEE Society, p. 315-318 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  56. 2014
  57. 3D/ 2.5D stacked IC cost modeling and test flow selection

    Hamdioui, S., 2014, p. 1-1. 1 p.

    Research output: Contribution to conferenceAbstractScientific

  58. A novel productivity-driven logic element for field-programmable devices

    Marconi, T., Bertels, KLM. & Gaydadjiev, GN., 2014, In : International Journal of Electronics. 101, 6, p. 731-762 32 p.

    Research output: Contribution to journalArticleScientificpeer-review

  59. A run-time modulo scheduling by using a binary translation mechanism

    Ferreira, R., Denver, W., Pereira, M., Quadros, J., Carro, L. & Wong, S., 2014, Proceedings - 2014 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. Galuzzi, C. & Veidenbaum, AV. (eds.). Piscataway, NJ, USA: IEEE Society, p. 75-82 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  60. A survey on low-power techniques for single and multicore systems

    Zandrahimi, M. & Al-Ars, Z., 2014, Proceedings 3rd International Conference on Context-Aware Systems and Applications. Mansoor, W., Maamar, Z. & Rabhi, F. (eds.). Ghent, Belgium: EAI, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  61. Adaptive, low-power architectures for embedded multimedia systems: with focus on H.264/AVC video codec

    Nadeem, M., 2014, 136 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  62. Analysis of the impact of spatial and temporal variations on the stability of SRAM arrays and the mitigation technique using independent-gate devices

    Wang, Y., Cotofana, SD. & Fang, L., 2014, In : Journal of Parallel and Distributed Computing. 74, 6, p. 2521-2529 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  63. Automated hybrid interconnect design for FPGA accelerators using data communication profiling

    Pham Quoc Cuong, P., Al-Ars, Z. & Bertels, K., 2014, Proceedings - IEEE 28th International Parallel and Distributed Processing Symposium Workshops. Parashar, M. (ed.). Los Alamitos, CA, USA: IEEE, p. 151-160 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  64. Automatic hardware generation for reconfigurable architectures

    Nane, R., 2014, 179 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  65. Bias temperature instability analysis of FinFET based SRAM cells

    Seyab, MSK., Agbo, IO., Hamdioui, S., Kukner, H., Kaczer, B., Raghavan, P. & Catthoor, F., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Nebel, W. & Fettweis, G. (eds.). Leuven, Belgium: EDAA, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  66. Co-processing with dynamic reconfiguration on heterogeneous MPSoC: practices and design tradeoffs

    Wang, C., Li, X., Zhou, X., Chen, Y. & Bertels, K., 2014, p. 248-248. 1 p.

    Research output: Contribution to conferenceAbstractScientific

  67. CoMik: A predictable and cycle-accurately composable real-time microkernel

    Nelson, AT., Beyranvand Nejad, A., Molnos, AM., Koedam, M. & Goossens, KGW., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Fettweis, G. & Nebel, W. (eds.). Leuven, Belgium: EDAA, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  68. Comparison of reaction-diffusion and atomistic trap-based BTI models for logic gates

    Kukner, H., Khan, F., Weckx, P., Raghavan, P., Hamdioui, S., Kaczer, B., Catthoor, F., van der Perre, L., Lauwereins, R. & Groeseneken, G., 2014, In : IEEE Transactions on Device and Materials Reliability. 14, 1, p. 182-193 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  69. Composable and predictable power management

    Nelson, AT., 2014, 193 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  70. Composable virtual platforms for mixed-criticality embedded systems

    Beyranvand Nejad, A., 2014, 117 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  71. Critical transistors nexus based circuit-level aging assessment and prediction

    Cucu Laurenciu, N. & Cotofana, SD., 2014, In : Journal of Parallel and Distributed Computing. 74, 6, p. 2512-2520 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  72. Direct probing on large-array fine-pitch micro-bumps of a wide-I/O logic-memory interface

    Marinissen, EJ., De Wachter, B., Smith, K., Kiesewetter, J., Taouil, M. & Hamdioui, S., 2014, Proceedings 2014 IEEE International Test Conference. Purtell, M. & Mitra, S. (eds.). Washington, DC, USA: ITC & IEEE, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  73. ESL design of customizable real-time neuron networks

    van Eijk, M., Galuzzi, C., Zjajo, A., Smaragdos, G., Strydis, C. & van Leuken, TGRM., 2014, Proceedings - 2014 IEEE Biomedical Circuits and Systems Conference. Carrara, S. & Enz, C. (eds.). Piscataway, NJ, USA: IEEE Society, p. 671-674 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  74. Energy effective 3D stacked hybrid NEMFET-CMOS caches

    Lefter, M., Enachescu, M., Voicu, GR. & Cotofana, SD., 2014, Proceedings of the 2014 IEEE/ACM International Symposium on Nanoscale Architectures. Klein, JO. & Moritz, CA. (eds.). Piscataway, NJ, USA: IEEE Society, p. 151-156 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  75. Exploiting expendable process-margins in DRAMs for run-time performance optimization

    Chandrasekar, K., Goossens, S., Weis, C., Koedam, M., Akesson, B., Wehn, N. & Goossens, KGW., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Fettweis, G. & Nebel, W. (eds.). Leuven, Belgium: EDAA, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  76. Hacking and protecting IC hardware

    Hamdioui, S., di Natale, G., van Battum, G., Danger, J-L., Smailbegovic, F. & Tehranipoor, M., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Nebel, W. & Fettweis, G. (eds.). Leuven, Belgium: EDAA, p. 1-7 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  77. High-level power estimation and optimization of DRAMs

    Chandrasekar, K., 2014, 144 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  78. High-level synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain

    Nane, R., Sima, VM., Pham Quoc Cuong, P., Goncalves, F. & Bertels, K., 2014, Proceedings - 12th IEEE International Conference on Embedded and Ubiquitous Computing. Santambrogio, MD. (ed.). Los Alamitos, CA, USA: IEEE, p. 138-145 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  79. Interconnect test for 3D stacked memory-on-logic

    Taouil, M., Masadeh, M., Hamdioui, S. & Marinissen, EJ., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Nebel, W. & Fettweis, G. (eds.). Leuven, Belgium: EDAA, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  80. Layout-based refined NPSF model for DRAM characterization and testing

    Sfikas, Y., Tsiatouhas, YE. & Hamdioui, S., 2014, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 6, p. 1446-1450 5 p.

    Research output: Contribution to journalArticleScientificpeer-review

  81. Line graph based fast rerouting and reconfiguration for handling transient and permanent node failures

    Joshi, PD. & Hamdioui, S., 2014, Proceedings - 2014 IEEE 15th International Conference on High Performance Switching and Routing. Trajkovic, L. & Jajszczyk, A. (eds.). Piscataway, NJ, USA: IEEE Society, p. 167-172 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  82. Linear compositional delay model for the timing analysis of sub-powered combinational circuits

    Chen, J., Spagnol, C., Grandhi, S., Popovici, E., Cotofana, SD. & Amaricai, A., 2014, Proceedings - 2014 IEEE Computer Society Annual Symposium on VLSI. Mohanty, SP., Ranganathan, N. & Bhanja, S. (eds.). Los Alamitos, CA, USA: IEEE, p. 380-385 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  83. Link bandwidth aware backtracking based dynamic task mapping in NoC based MPSoCs

    Chen, C. & Cotofana, SD., 2014, Proceedings of the 2014 International Workshop on Network on Chip Architectures. Mehdipour, F. & Dimitrakopoulos et al, G. (eds.). New Tork, NY, USA: Association for Computing Machinery (ACM), p. 5-10 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  84. Memristor based memories: Technology, design and test

    Hamdioui, S., Aziza, H. & Sirakoulis, GC., 2014, Proceedings - 9th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era. Voyatzis, I. (ed.). Piscataway, NJ, USA: IEEE Society, p. 1-7 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  85. Multiple description coding for SNR scalable video transmission over unreliable networks

    Choupani, R., Wong, JSSM. & Tolun, MR., 2014, In : Multimedia Tools and Applications. 69, 3, p. 843-858 16 p.

    Research output: Contribution to journalArticleScientificpeer-review

  86. Process-variation-aware mapping of best-effort and real-time streaming applications to MPSoCs

    Mirzoyan, D., Akesson, B. & Goossens, KGW., 2014, In : ACM Transactions on Embedded Computing Systems. 13, 2s, p. 1-24 24 p.

    Research output: Contribution to journalArticleScientificpeer-review

  87. Quality versus cost analysis for 3D Stacked ICs

    Taouil, M., Hamdioui, S. & Marinissen, EJ., 2014, Proceedings - 32nd IEEE VLSI Test Symposium. Thibeault, C. (ed.). Los Alamitos, CA, USA: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  88. Reconfigurable high performance architectures: How much are they ready for safety-critical applications?

    Sabena, D., Sterpone, L., Schölzel, M., Koal, T., Vierhaus, HT., Wong, S., Glein, R., Rittner, F., Stender, C., Porrman, M. & Hagemeyer, J., 2014, Proceedings - 19th IEEE European Test Symposium. Hellebrand, S. (ed.). Piscataway, NJ, USA: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  89. Region disjoint paths in a class of optimal line graph networks

    Joshi, PD., Sen, A., Hamdioui, S. & Bertels, K., 2014, Proceedings - 17th IEEE International Conference on Computational Science and Engineering (CSE 2014). El Baz, D., Liu, X., Hsu, CH., Kang, K. & Chen, W. (eds.). Los Alamitos, CA, USA: IEEE, p. 1256-1260 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  90. Robust sub-powered asynchronous logic

    Chen, J., Tisserand, A., Popovici, E. & Cotofana, SD., 2014, Proceedings 2014 24th International Workshop on Power And Timing Modeling, Optimization and Simulation. Roca Androver, M., Becker, J. & Canals, V. (eds.). Piscataway, NJ, USA: IEEE Society, p. 1-7 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  91. Security methods in fault tolerant modified line graph based networks

    Joshi, PD. & Hamdioui, S., 2014, Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). Ottavi, M. & Hamdioui, S. (eds.). Piscataway, NJ, USA: IEEE Society, p. 57-62 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  92. Shortest path reduction in a class of uniform fault tolerant networks

    Joshi, PD. & Hamdioui, S., 2014, Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). Ottavi, M. & Hamdioui, S. (eds.). Piscataway, NJ, USA: IEEE Society, p. 234-239 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  93. Spatial multiple description coding for scalable video streams

    Choupani, R., Wong, S. & Tolun, M., 2014, In : International Journal of Digital Multimedia Broadcasting. 2014, Art. nr. 132621, p. 1-8 8 p.

    Research output: Contribution to journalArticleScientificpeer-review

  94. Testing PUF-based secure key storage circuits

    Cortez, AMMO., Roelofs, G., Hamdioui, S. & di Natale, G., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Fettweis, G. & Nebel, W. (eds.). Leuven, Belgium: EDAA, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  95. Testing methods for PUF-based secure key storage circuits

    Cortez, AMMO., Roelofs, G., Hamdioui, S. & di Natale, G., 2014, In : Journal of Electronic Testing: theory and applications. 30, 5, p. 581-594 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  96. Towards an effective utilization of partially defected interconnections in 2D mesh NoCs

    Chen, C. & Cotofana, SD., 2014, Proceedings - 2014 IEEE Computer Society Annual Symposium on VLSI. Mohanty, SP., Ranganathan, N. & Bhanja, S. (eds.). Los Alamitos, CA, USA: IEEE, p. 492-497 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  97. Towards energy effective LDPC decoding by exploiting channel noise variability

    Marconi, T., Spagnol, C., Popovici, E. & Cotofana, SD., 2014, Proceedings - 2014 22nd International Conference on Very Large Scale Integration. Garcia, L. (ed.). Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  98. Yield and cost analysis or 3D stacked ICs

    Taouil, M., 2014, 215 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  99. 2013
  100. 3D stacked wide-operand adders: A case study

    Voicu, GR., Lefter, M., Enachescu, M. & Cotofana, SD., 2013, Proceedings 2013 IEEE 24th International Conference on Application-specific Systems, Architectures and Processors. El-Ghawazi, T. & Smith et al, M. (eds.). Los Alamitos, CA, USA: IEEE, p. 133-141 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  101. A 2×13-bit all-digital I/Q RF-DAC in 65-nm CMOS

    Alavi, SM., Voicu, GR., Staszewski, RB., de Vreede, LCN. & Long, JR., 2013, Digest of Papers - 2013 IEEE Radio Frequency Integrated Circuits Symposium. Hancock, TM. (ed.). Piscataway, NJ, USA: IEEE Society, p. 167-170 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  102. A direct measurement scheme of amalgamated aging effects with novel on-chip sensor

    Cucu Laurenciu, N. & Cotofana, SD., 2013, 21st IFIP/IEEE international conference on very large scale integration. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  103. A fully dynamic reconfigurable NoC-based MPSoC: the advantages of a multi-level reconfiguration

    Santos, PC., Nazar, GL., Anjam, F., Wong, JSSM., Matos, D. & Carro, L., 2013.

    Research output: Contribution to conferencePosterScientific

  104. A fully dynamic reconfigurable NoC-based MPSoC: the advantages of total reconfiguration

    Santos, PC., Nazar, GL., Anjam, F., Wong, JSSM., Matos, D. & Carro, L., 2013, 7th HiPEAC workshop on reconfigurable computing. s.n. (ed.). Berlin: Springer, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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