1. 2013
  2. A hardware/software platform for QoS bridging over multi-chip NoC-based systems

    Beyranvand Nejad, A., Molnos, AM., Escudero Martinez, M. & Goossens, KGW., 2013, In : Parallel Computing. 39, 9, p. 424-441 18 p.

    Research output: Contribution to journalArticleScientificpeer-review

  3. A low cost method to tolerate soft errors in the NoC router control plane

    Chen, C. & Cotofana, SD., 2013, 26th Annual IEEE International SoC Conference). s.n. (ed.). Piscataway: IEEE Society, p. 374-379 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  4. A method and system for power management

    Molnos, AM. & Goossens, KGW., 2013, Patent No. US 8569911 B2, Priority date 29 Oct 2013

    Research output: PatentOther research output

  5. A nonlinear degradation path dependent end-of-life estimation framework from noisy observations

    Cucu Laurenciu, N. & Cotofana, SD., 2013, In : Microelectronics Reliability. 53, 9-11, p. 1213-1217 5 p.

    Research output: Contribution to journalArticleScientificpeer-review

  6. A software-based technique enabling composable hierarchical preemptive scheduling for time-triggered applications

    Beyranvand Nejad, A., Molnos, AM. & Goossens, KGW., 2013, 19th IEEE International conference on embedded and real-time computing systems and applications. s.n. (ed.). Piscataway: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  7. A unified execution model for multiple computation models of streaming applications on a composable MPSoC

    Beyranvand Nejad, A., Molnos, AM. & Goossens, KGW., 2013, In : Journal of Systems Architecture. 59, 10, part C, p. 1032-1046 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  8. Adapting voltage ramp-up time for temperature noise reduction on memory-based PUFs

    Monteiro OliveiraCortez, AM., van der Leest, V., Maes, R., Schrijen, GJ. & Hamdioui, S., 2013, IEEE International symposium on hardware-oriented security and trust. s.n. (ed.). Piscataway: IEEE Society, p. 35-40 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. Addressing GPU on-chip shared memory bank conflicts using elastic pipeline

    Gou, C. & Gaydadjiev, GN., 2013, In : International Journal of Parallel Programming. 41, 3, p. 400-429 30 p.

    Research output: Contribution to journalArticleScientificpeer-review

  10. Aging assessment and reliability aware omputing platforms

    Wang, Y., 2013, 126 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  11. An efective routing algorithm to avoid unnecessary link abandon in 2D mesh NoCs

    Chen, C. & Cotofana, SD., 2013, 16th Euromicro Conference on Digital System Design. s.n. (ed.). Piscataway: IEEE Society, p. 311-318 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. An effective new CRT based reverse converter for a novel moduli set { 2^(2n+1)-1, 2^(2n+1), 2^(2n)-1 }

    Bankas, EK., Gbolagade, KA. & Cotofana, SD., 2013, Proceedings 2013 IEEE 24th International Conference on Application-specific Systems, Architectures and Processors. El-Ghawazi, T. & Smith et al, M. (eds.). Los Alamitos, CA , USA: IEEE, p. 142-146 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  13. An energy effective SIMD accelerator for visual pattern matching

    Bira, C., Gugu, L., Hobincu, R., Codreanu, V., Petrica, L. & Cotofana, SD., 2013, 4th International symposium on highly efficient accelerators and reconfigurable technologies. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  14. Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers

    Papameletis, C., Keller, B., Chickermane, V., Marinissen, EJ. & Hamdioui, S., 2013, 18th IEEE European Test Symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  15. Better than worst-case design for streaming applications under process variation

    Mirzoyan, D., 2013, Delft: D. Mirzoyan. 106 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  16. Bias temperature instability analysis in SRAM decoder

    Seyab, MSK., Hamdioui, S., Kukner, H., Raghavan, P. & Catthoor, F., 2013, Proceedings 18th IEEE European Test Symposium. Girard, P. & Peng, Z. (eds.). Los Alamitos, CA, USA: IEEE Society, p. 1-1 1 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  17. Bias temperature instability analysis, monitoring and mitigation for nano-scaled circuits

    Seyab, MSK., 2013, 133 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  18. Compiler-aided methodology for low overhead on-line testing

    Nazarian, G., Seepers, R. M., Strydis, C. & Gaydadjiev, GN., 2013, Proceedings - 2013 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. Silven, O. & Jeschke, H. (eds.). Piscataway, NJ, USA: IEEE Society, p. 219-226 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  19. Configurable fault-tolerance for a configurable VLIW processor

    Anjam, F. & Wong, JSSM., 2013, 9th International symposium on applied reconfigurable computing. Brisk, P., de Figueiredo Coutinho, JG. & Diniz, P. (eds.). Berlin: Springer, p. 1-12 12 p. (Lecture Notes in Computer Science; vol. 7806).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  20. Controlled degradation stochastic resonance in adaptive averaging cell based architectures

    Aymerich, N., Cotofana, SD. & Rubio, A., 2013, In : IEEE Transactions on Nanotechnology. 12, 6, p. 888-896 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  21. Controlling a complete hardware synthesis toolchain with LARA aspects

    Cardoso, JMP., Carvalho, T., Coutinho, JGF., Nobre, R., Nane, R., Diniz, P., Petrov, Z., Luk, W. & Bertels, KLM., 2013, In : Microprocessors and Microsystems. 37, 8, p. 1073-1089 17 p.

    Research output: Contribution to journalArticleScientificpeer-review

  22. Custom architecture for multicore audio Beamforming systems

    Theodoropoulos, D., Kuzmanov, GK. & Gaydadjiev, GN., 2013, In : ACM Transactions on Embedded Computing Systems. 13, 2, p. 1-26 26 p.

    Research output: Contribution to journalArticleScientificpeer-review

  23. Customizable register files for multidimensional SIMD architectures

    Ciobanu, CB., 2013, 135 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  24. Deriving resource efficient designs using the REFLECT aspect-oriented approach

    Coutinho, JGF., Cardoso, JMP., Carvalho, T., Nobre, R., Bhattacharya, S., Diniz, PC., Fitzpatrick, L. & Nane, R., 2013, International symposium ARC. Coutinho, JGF., Brisk, P. & Diniz, PC. (eds.). Heidelberg: Springer, p. 226-228 3 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  25. Efficent and highly portable deterministic multithreading (DetLock)

    Mushtaq, H., Al-Ars, Z. & Bertels, KLM., 2013, In : Computing. 95, p. 1-17 17 p.

    Research output: Contribution to journalArticleScientificpeer-review

  26. Efficient software based fault tolerance approach on multicore platforms

    Mushtaq, H., Al-Ars, Z. & Bertels, KLM., 2013, Design, automation & test in Europe conference & exhibition. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  27. Embedded reconfigurable computing: the ERA approach

    Keramidas, G., Wong, JSSM., Anjam, F., Brandon, AAC., Seedorf, RAE., Scordino, C., Carro, L. & Matos, D., 2013, 11th IEEE International conference on industrial informatics. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  28. Evaluation framework for task scheduling algorithms in distributed reconfigurable systems

    Nadeem, MF., 2013, 141 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  29. Evaluation methodology for data communication-aware application partitioning

    Ashraf, I., Ostadzadeh, SA., Meeuws, RJ. & Bertels, KLM., 2013, 1st Workshop on Runtime and Operating Systems for the Many-core Era. Wolf, F., Mohr, B. & Dieter an Mey (eds.). Heidelberg: Springer, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  30. Heterogeneous hardware accelerator architecture for streaming image processing

    Pham Quoc Cuong, P., Al-Ars, Z. & Bertels, KLM., 2013, International Conference on Advanced Technologies for Communications. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  31. Heterogeneous hardware accelerators interconnect: an overview

    Pham Quoc Cuong, P., Al-Ars, Z. & Bertels, KLM., 2013, 7th HiPEAC workshop on reconfigurable computing. s.n. (ed.). Berlin: Springer, p. 1-12 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  32. Heterogeneous hardware accelerators interconnect: an overview

    Pham Quoc Cuong, P., Al-Ars, Z. & Bertels, KLM., 2013, NASA/ESA Conference on adaptive hardware and systems. s.n. (ed.). Piscataway: IEEE Society, p. 189-195 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  33. Hybrid interconnect design for heterogeneous hardware accelerators

    Pham Quoc Cuong, P., Heisswolf, J., Wenner, S., Al-Ars, Z., Becker, JA. & Bertels, KLM., 2013, Design, automation & test in Europe conference & exhibition. s.n. (ed.). Piscataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  34. Impact of mid-bond testing in 3D stacked ICs

    Taouil, M., Hamdioui, S., Marinissen, EJ. & Bhawmik, S., 2013, 16th IEEE Symposium on defect and fault tolerance in VLSI and nanotechnology systems. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  35. Is TSV-based 3D integration suitable for inter-die memory repair?

    Lefter, M., Voicu, GR., Taouil, M., Enachescu, M., Hamdioui, S. & Cotofana, SD., 2013, Design, automation & test in Europe conference & exhibition. s.n. (ed.). Piscataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  36. Lifetime reliability assessment with aging information from low-level sensors

    Wang, Y., Cotofana, SD. & Fang, L., 2013, Proceedings of the 23rd ACM International Conference on Great Lakes Symposium on VLSI. Ayala, J. (ed.). New York, NY, USA: Association for Computing Machinery (ACM), p. 339-340 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  37. Nanostructure analysis of P-doped nanocrystalline silicon oxide

    Babal, P., Lopez, H., Xie, L., van Veen, B., van Sebille, M., Tan, H., Zeman, M. & Smets, AHM., 2013, Proceedings - 28th European Photovoltaic Solar Energy Conference and Exhibition. Mine, A., Jager-Waldau, A. & Helm, P. (eds.). Munich, Germany: WIP, p. 2580-2587 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  38. Nature inspired self organization for adhoc grids

    Abdullah, MT., Anjum, A., Bessis, N., Sotiriadis, S. & Bertels, KLM., 2013, Proceedings 27th IEEE International Conference on Advanced Information Networking and Applications. Barolli, L. & Xhafa et al, F. (eds.). Los Alamitos, CA, USA: IEEE, p. 682-689 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  39. Quipu: a statistical model for predicting hardware resources

    Meeuws, RJ., Ostadzadeh, SA., Galuzzi, C., Sima, VM., Nane, R. & Bertels, KLM., 2013, In : ACM Transactions on Reconfigurable Technology and Systems. 6, 1, p. 1-25 25 p.

    Research output: Contribution to journalArticleScientificpeer-review

  40. Reliability challenges of real-time systems in forthcoming technology nodes

    Hamdioui, S., Gizopoulos, D., Guido, G. & Nicolaidis, M., 2013, Design, automation & test in Europe conference & exhibition. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  41. Run-time adaptable VLIW processors -- resources, performance, power consumption, and reliability trade-offs

    Anjam, F., 2013, 144 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  42. Run-time slack distribution for real-time data-flow applications on embedded MPSoC

    Zaykov, PG., Kuzmanov, GK., Molnos, AM. & Goossens, KGW., 2013, 16th Euromicro conference on digital system design. s.n. (ed.). Piscataway: IEEE Society, p. 39-47 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  43. Separable 2D convolution with polymorphic register files

    Ciobanu, CB. & Gaydadjiev, GN., 2013, 26th International conference on architecture of computing systems. Hochberger et al (ed.). Berlin: Springer, p. 317-328 12 p. (Lecture Notes in Computer Science; vol. 7767).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  44. System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs

    Chandrasekar, K., Weis, C., Akesson, B., Wehn, N. & Goossens, KGW., 2013, Proceedings 2013 Design, Automation & Test in Europe conference & exhibition. Preas, K. (ed.). Leuven, Belgium: EDAA, p. 236-241 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  45. TLM modelling of 3D stacked wide I/O DRAM Subsystems

    Jung, M., Weis, C., Wehn, N. & Chandrasekar, K., 2013, Proceedings 5th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools. Palermo, G., Gracia Perez, D. & Castrillon et al, J. (eds.). New York, NY, USA: Association for Computing Machinery (ACM), p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  46. The CompSOC design flow for virtual execution platforms

    Goossens, SLM., Akesson, B., Koedam, M., Beyranvand Nejad, A., Nelson, AT. & Goossens, KGW., 2013, 10th FPGAworld Conference. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  47. The genetic heterogeneity and mutational burden of engineered melanomas in zebrafish models

    Yen, J., White, RM., Wedge, DC., van Loo, P., de Ridder, J., Capper, A., Richardson, J., Jones, D., Raine, K., Watson, IR., Wu, C-J., Cheng, J., Martincorena, I., Nik-Zainal, S., Mudie, LJ., Moreau, Y., Marshall, J., Ramakrishna, M., Tarpey, P., Shlien, A. & 20 othersWhitmore, I., Gamble, S., Latimer, C., Langdon, E., Kaufman, C., Dovey, M., Taylor, A., Menzies, A., Mclaren, S., O Meara, S., Butler, A., Teague, J., Lister, J., Chin, L., Campbell, PJ., Adams, DJ., Zon, LI., Patton, EE., Stemple, DL. & Futreal, AP., 2013, In : Genome Biology (Online). 14, R113, p. 1-14 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  48. Throughput analysis and voltage-frequency island partitioning for streaming applications under process variation

    Mirzoyan, D., Stuijk, S., Akesson, B. & Goossens, KGW., 2013, Proceedings 2013 IEEE 11th Symposium on Embedded Systems for Real-Time Multimedia. Stefanov, T. & Palesi et al, M. (eds.). Piscataway, NJ, USA: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  49. Towards heterogenous 3D-stacked reliable computing with von Neumann multiplexing

    Voicu, GR. & Cotofana, SD., 2013, 9th ACM/IEEE International Symposium on Nanoscale Architectures). s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  50. Towards variation-aware system-level power estimation of DRAMs: an empirical approach

    Chandrasekar, K., Weis, C., Akesson, B., Wehn, N. & Goossens, KGW., 2013, 50th Design Automation Conference. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  51. Ultra low power NEMFET based logic

    Enachescu, M., Lefter, M., Bazigos, A., Ionescu, A. & Cotofana, SD., 2013, IEEE International symposium on circuits and systems. Piscataway: IEEE Society, p. 566-569 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  52. Using 3D-COSTAR for 2.5D test cost optimization

    Taouil, M., Hamdioui, S., Marinissen, EJ. & Bhawmik, S., 2013, IEEE International 3D Systems Integration Conference. s.n. (ed.). Piscataway: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  53. VASILE: a reconfigurable vector architecture for instruction level frequency scaling

    Petrica, L., Codreanu, V. & Cotofana, SD., 2013, 12th IEEE low voltage low power conference. s.n. (ed.). Piscataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  54. Variability and reliability analyses in SRAM decoder

    Seyab, MSK. & Hamdioui, S., 2013, 4th Workshop on design for reliability. s.n. (ed.). s.l.: s.n., p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  55. Virtual execution platforms for mixed-time-criticality systems: The CompSOC architecture and design flow

    Goossens, KGW., Pereira de Azevedo Filho, AP., Chandrasekar, K., Mirzoyan, D., Molnos, AM., Beyranvand Nejad, A. & Nelson, AT., 2013, In : SIGBED Review. 10, 3, p. 23-34 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  56. 2012
  57. 3D-COSTAR: a cost model for 3D stacked ICs

    Taouil, M., Hamdioui, S., Marinissen, EJ. & Bhawmik, S., 2012, Proceedings Third IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits. Zorian, Y., Marijnissen, E. & Hamdioui, S. (eds.). Los Alamitos, CA, USA: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  58. A 3D stacked high performance scalable architecture for 3D fourier transform

    Voicu, GR., Enachescu, M. & Cotofana, SD., 2012, 30th IEEE international conference on computer design. s.n. (ed.). New York: IEEE Society, p. 1-2 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  59. A Markovian, variation-aware circuit-level aging model

    Cucu Laurenciu, N. & Cotofana, SD., 2012, International symposium on nanoscale architectures. s.n. (ed.). New York: IEEE Society, p. 1-7 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  60. A heuristic-based communication-aware hardware optimization approach in heterogeneous multicore systems

    Pham Quoc Cuong, P., Al-Ars, Z. & Bertels, KLM., 2012, Conference on ReConFigurable computing and FPGAs. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  61. A lightweight speculative and predicative scheme for hardware execution

    Nane, R., Sima, VM. & Bertels, KLM., 2012, International conference on ReConFigurable computing and FPGAs. s.n. (ed.). New York: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  62. A novel flit serialization strategy to utilize partially faulty links in networks-on-chip

    Chen, C. & Lu, Y., 2012, 2012 Sixth IEEE/ACM international symposium on networks-on-chip. s.n. (ed.). New York: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  63. A predictor-based power-saving policy for DRAM memories

    Thomas, G., Chandrasekar, K., Akesson, B., Juurlink, BHH. & Goossens, KGW., 2012, 15th Euromicro conference on digital system design. s.n. (ed.). s.n.: Euromicro, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  64. A run-time task migration scheme for an adjustable issue-slots multi-core processor

    Anjam, F., Kong, Q., Seedorf, RAE. & Wong, JSSM., 2012, 8th International symposium on applied reconfigurable computing. s.n. (ed.). s.l.: s.n., p. 1-12 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  65. A user-level library for fault tolerance on shared memory multicore systems

    Mushtaq, H., Al-Ars, Z. & Bertels, KLM., 2012, 15th IEEE symposium on design and diagnostics of electronic circuits and systems. s.n. (ed.). s.l.: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  66. Adapting communication for adaptable processors: a multi-axis reconfiguration approach

    Santos, PC., Nazar, GL., Anjam, F. & Wong, JSSM., 2012, International conference on ReConFigurable computing and FPGAs. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  67. Adaptive fault-tolerant architecture for unreliable technologies with heterogenous variability

    Aymerich, N., Cotofana, SD. & Rubio, A., 2012, In : IEEE Transactions on Nanotechnology. 11, 4, p. 1-12 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  68. Analyzing combined impacts of parameter variations and BTI in nano-scale logical gates

    Seyab, MSK. & Hamdioui, S., 2012, 1st Workshop on manufacturable and dependable multicore architectures at nanoscale. s.n. (ed.). s.l.: s.n., p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  69. Architecture and design flow for a debug event distribution interconnect

    Pereira de Azevedo Filho, AP., Vermeulen, B. & Goossens, KGW., 2012, 30th IEEE International conference on computer design. s.n. (ed.). s.l.: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  70. Area constraint propagation in high level synthesis

    Nane, R., Sima, VM. & Bertels, KLM., 2012, International conference on field-programmable technology. s.n. (ed.). New York: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  71. BTI Impacts on logical gates in nano-scale CMOS technology

    Seyab, MSK., Hamdioui, S., Kukner, H., Catthoor, F. & Raghavan, P., 2012, 15th IEEE Symposium on design and diagnostics of electronic circuits and systems. s.n. (ed.). s.l.: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  72. Communication-aware HW/SW co-design for heterogeneous multicore platforms

    Ashraf, I., Ostadzadeh, SA., Meeuws, RJ. & Bertels, KLM., 2012, 10th International workshop on dynamic analysis. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  73. Comparative BTI analysis in nano-scale circuits lifetime

    Seyab, MSK., Hamdioui, S. & Catthoor, F., 2012, 4th Workshop on design for reliability. s.n. (ed.). s.l.: s.n., p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  74. Comparative analysis of soft and hard on-chip interconnects for FPGAs

    Hur, JY., Goossens, KGW., Mhamdi, L. & Wahlah, MA., 2012, In : IET Computers and Digital Techniques. 6, 1, p. 1-10 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  75. Compiler assisted runtime adaption

    Sima, VM., 2012, Delft. 129 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  76. Conclusion: multi-core processor architectures are here to stay.

    Bertels, KLM., 2012, Hardware/Software co-design for heterogeneous multi-core platforms. Bertels, KLM. (ed.). Berlin, Germany: Springer, p. 229-231 234 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientific

  77. Context aware slope based transistor-level aging model

    Cucu Laurenciu, N. & Cotofana, SD., 2012, In : Microelectronics Reliability. 52, 9-10, p. 1-6 6 p.

    Research output: Contribution to journalArticleScientificpeer-review

  78. Customisation of on-chip network interconnects and experiments in field-programmable gate arrays

    Hur, JY., Stefanov, TP., Wong, JSSM. & Goossens, KGW., 2012, In : IET Computers and Digital Techniques. 6, 1, p. 59-68 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  79. DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler

    Nane, R., Sima, VM., Olivier, B., Meeuws, RJ., Yankova, YD. & Bertels, KLM., 2012, 22nd International conference on field programmable logic and applications. s.n. (ed.). s.l.: s.n., p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  80. Decoupled inter- and intra-application scheduling for composable and robust embedded MPSoC platforms

    Molnos, AM., Beyranvand Nejad, A., Nguyen, BT., Cotofana, SD. & Goossens, KGW., 2012, 15th Intl.Workshop on software and compilers for embedded systems. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-9 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  81. Degradation stochastic resonance (DSR) in AD-AVG architectures

    Aymerich, N., Cotofana, SD. & Rubio, A., 2012, 12th IEEE International conference on nanotechnology. s.n. (ed.). New York: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  82. Design of a pipelined and parameterized VLIW processor: r-VEX v.2.0

    Seedorf, RAE., Anjam, F., Brandon, AAC. & Wong, JSSM., 2012, 6th HiPEAC workshop on reconfigurable computing. s.n. (ed.). s.l.: s.n., p. 1-12 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  83. DetLock: portable and efficient deterministic execution for shared memory multicore systems

    Mushtaq, H., Al-Ars, Z. & Bertels, KLM., 2012, 5th International workshop on multi-core computing systems. s.n. (ed.). s.l.: s.n., p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  84. DfT schemes for resistive open defects in RRAMs

    Haron, NZB. & Hamdioui, S., 2012, Design, automation & test in Europe conference & exhibition. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  85. Efficient datapath merging for the overhead reduction of run-time reconfigurable systems

    Fazlali, M., Zakerolhosseini, A. & Gaydadjiev, GN., 2012, In : Journal of Supercomputing: an international journal of high-performance computer design, analysis and use. 59, 2, p. 636-657 22 p.

    Research output: Contribution to journalArticleScientificpeer-review

  86. Embedded computer architecture laboratory: a hands-on experience programming embedded systems with resource and energy constraints

    Nelson, AT., Molnos, AM., Beyranvand Nejad, A., Mirzoyan, D., Cotofana, SD. & Goossens, KGW., 2012, Workshop on embedded and cyber-physical systems education. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  87. Energy efficient wireless attitude determination system for spacecraft

    Gaydadjiev, GN., Amini, R. & Gill, EKA., 2012, Patent No. 2005664, Priority date 14 May 2012

    Research output: PatentOther research output

  88. Evaluation of different task scheduling policies in multi-core systems with recon¿gurable hardware

    Shahsavari, M., Al-Ars, Z. & Bertels, KLM., 2012, 8th International summer school on advanced computer architecture and compilation for high-performance and embedded systems. s.n. (ed.). s.l.: s.n., p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  89. Exploring test opportunities for memory and interconnects in 3D ICs

    Taouil, M., Lefter, M. & Hamdioui, S., 2012, International design & test symposium. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  90. Extensions of the hArtes tool chain

    Meeuws, RJ., Ostadzadeh, SA., Nawaz, Z., Lu, Y., Thomas, TM., Sabeghi, M., Sima, VM. & Sigdel, K., 2012, Hardware/Software co-design for heterogeneous multi-core platforms. Bertels, KLM. (ed.). Berlin, Germany: Springer, p. 193-227 234 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientific

  91. Fault tolerance on multicore processors using deterministic multithreading

    Mushtaq, H., Al-Ars, Z. & Bertels, KLM., 2012, International design & test symposium. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  92. Field programmable gate arrays with hardwired networks on chip

    Wahlah, MA., 2012, Delft. 229 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  93. Hardware algorithms for tile-based real-time rendering

    Crisu, D., 2012, Delft. 208 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  94. Impact of partial resistive defects and bias temperature instability on SRAM decoder reliablity

    Seyab, MSK., Hamdioui, S., Taouil, M., Kukner, H., Raghavan, P. & Catthoor, F., 2012, International design & test symposium. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  95. Implementation study of FFT on multi-lane vector processors

    Spinean, B. & Gaydadjiev, GN., 2012, 15th Euromicro Conference on Digital System Design. s.n. (ed.). s.l.: Euromicro, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  96. Improving DRAM performance and energy efficiency

    Spinean, B., Geursen, AAJ. & Gaydadjiev, GN., 2012, IEEE Symposium on embedded systems for real-time multimedia. s.n. (ed.). s.l.: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  97. Incorporating Parameter Variations in BTI Impact on Nano-scale Logical Gates Analysis

    Seyab, MSK., Hamdioui, S., Kukner, H., Raghavan, P. & Catthoor, F., 2012, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. s.n. (ed.). New York: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  98. Introduction

    Bertels, KLM., 2012, Hardware/Software co-design for heterogeneous multi-core platforms. Bertels, KLM. (ed.). Berlin, Germany: Springer, p. 1-8 234 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientific

  99. Is 3D integration the way to future dependable computing platforms?

    Safiruddin, S., Borodin, DV., Lefter, M., Voicu, GR. & Cotofana, SD., 2012, 3th International conference on optimization of electrical and electronic equipment. s.n. (ed.). New York: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  100. Is the road towards "zero-energy" paved with NEMFET-based power management?

    Enachescu, M., Voicu, GR. & Cotofana, SD., 2012, IEEE International symposium on circuits and systems. New York: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  101. Modeling SRAM Start-Up Behavior for Physical Unclonable Functions

    Monteiro OliveiraCortez, AM., Dargar, A., Schrijen, GJ. & Hamdioui, S., 2012, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. s.n. (ed.). New York: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  102. Multithreading on reconfigurable hardware: an architectural approach

    Zaykov, PG. & Kuzmanov, GK., 2012, In : Microprocessors and Microsystems. 36, 8, p. 695-704 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

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