1. 2010
  2. On-chip interconnect protocol stack exploration for FPGA board-to-board bridging

    Beyranvand Nejad, A., Escudero Martinez, M. & Goossens, KGW., 2010.

    Research output: Contribution to conferencePosterScientific

  3. On-chip network interfaces supporting automatic burst write creation, posted writes and read prefetch

    Stefan, RA., Windt de, J. & Goossens, KGW., 2010, 2010 Intl. conf. on embedded computer systems: architectures, modeling and simulation. s.n. (ed.). Piscataway: IEEE Society, p. 185-192 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  4. Parasitic memory effect in CMOS SRaMs

    Irobi, IS., Al-Ars, Z. & Renovell, M., 2010, 5th Intl. design and test workshop. Elahi, I., Ivanov, A., Zorian, Y. & Salem, A. (eds.). Piscataway: IEEE Society, p. 134-142 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  5. Performance and bandwidth optimization for biological sequence alignment

    Hasan, L., Al-Ars, Z., Taouil, M. & Bertels, KLM., 2010, 5th Intl. design and test workshop. Elahi, I., Ivanov, A., Zorian, Y. & Salem, A. (eds.). Piscataway: IEEE Society, p. 155-160 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  6. Performance guarantees in partially buffered crossbar switches

    Skalis, N. & Mhamdi, LL., 2010, IEEE Globecom 2010 proceedings. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  7. Performance-oriented fault tolerance in computing systems

    Borodin, D., 2010, Delft. 138 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  8. Power analysis of parallel CA-CFAR FPGA design

    Kyovtorov, VA., Kabakchiev, H. & Kuzmanov, GK., 2010, 11th intl. radar symposium. s.n. (ed.). Piscataway: IEEE Society, p. 305-308 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. Power consumption evaluation for biological sequence alignment

    Hasan, L. & Al-Ars, Z., 2010, ProRISC 2010. French, PJ. (ed.). Nederland: STW, p. 42-46 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. Protective redundancy overhead reduction using instruction vulnerability factor

    Borodin, D. & Juurlink, B., 2010, 2010 ACM interl. conf. on Computing Frontiers. s.n. (ed.). New York: Association for Computing Machinery (ACM), p. 319-326 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. QUAD - a memory access pattern analyser

    Ostadzadeh, SA., Meeuws, RJ., Galuzzi, C. & Bertels, K., 2010, 6th Intl symposium, ARC 2010. Sirisuk, P., Morgan, F., El-Ghazawi, T. & Amano, H. (eds.). Heidelberg: Springer, p. 269-281 13 p. (Lecture Notes in Computer Science; vol. 5992).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. QUAD-quantitative usage analysis of data

    Ostadzadeh, SA., Meeuws, RJ. & Bertels, KLM., 2010.

    Research output: Contribution to conferencePosterScientific

  13. Redundant residue number system code for fault-tolerant hybrid memories

    Haron, NZB. & Hamdioui, S., 2010, In : ACM Journal on Emerging Technologies in Computing Systems. 20, p. 1-19 19 p.

    Research output: Contribution to journalArticleScientificpeer-review

  14. Runtime multitasking support on reconfigurable accelerators

    Sabeghi, M., Mushtaq, H. & Bertels, K., 2010, 1st Intl. workshop on highly-efficient accelerators and reconfigurable technologies. s.n. (ed.). s.l.: s.n., p. 54-59 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  15. Runtime task mapping based on hardware configuration reuse

    Sigdel, K., Galuzzi, C., Bertels, KLM., Thompson, M. & Pimentel, AD., 2010, 2010 Intl. conf. on reconfigurable computing. s.n. (ed.). Piscataway: IEEE Society, p. 25-30 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  16. SAMS multi-layout memory: providing multiple views of data to boost SIMD performance

    Gou, C., Kuzmanov, GK. & Gaydadjiev, GN., 2010, 2010 Intl. conf. on supercomputing. s.n. (ed.). NY: Association for Computing Machinery (ACM), p. 179-188 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  17. Scalability analysis of progressive alignment on a multicore

    Isaza Ramirez, S., Sanchez, F., Gaydadjiev, GN., Ramirez, A. & Valero, M., 2010, 4th Intl. conf. on complex, intelligent and software intensive systems. Barolli, L., Xhafa, F., Vitabile, S. & Hsu, H. (eds.). s.l.: s.n., p. 889-893 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  18. Temperature dependence of NBTI induced delay

    Seyab, MSK. & Hamdioui, S., 2010, 16th IEEE intl. on-line testing symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  19. Temperature impact on NBTI modeling in the framework of technology scaling

    Seyab, MSK. & Hamdioui, S., 2010, 5th Intl. conf, HIPEAC 2010. Patt, Y., Foglia, P., Duesterwald, E., Faraboschi, P. & Martorell, X. (eds.). Heidelberg: Springer, p. 1-10 10 p. (Lecture Notes in Computer Science; vol. 5952).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  20. Test cost analysis for 3D die-to-wafer stacking

    Taouil, M., Hamdioui, S., Beenakker, CIM. & Marinissen, E., 2010, Proc. of the 19th Asian test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 435-441 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  21. The HiPEAC vision

    Duranton, M. & Gaydadjiev, GN., 2010, s.l.: s.n. 55 p.

    Research output: Book/ReportReportScientific

  22. The SARC architecture

    Juurlink, BHH., Pereira de Azevedo Filho, AP., Meenderinck, CH., Ciobanu, CB., Isaza Ramirez, S. & Gaydadjiev, GN., 2010, In : IEEE Micro. 30, 5, p. 17-29 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  23. The hartes carlab: a new approach to advanced algorithms development for automotive audio

    Cecchi, S., Sima, VM. & Bertels, KLM., 2010, AES 129th convention audio engineering society. s.n. (ed.). New York: AES, p. 1-12 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  24. The synchronization challenge

    Bertozzi, D., Strano, A., Ludovici, D. & Pavlidis, V., 2010, Designing network-on-chip architectures in the nanoscale era. Flich, J. & Bertozzi, D. (eds.). s.l.: s.n., p. 176-233 57 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  25. Topology exploration

    Gilabert, F., Ludovici, D., Engracia Gomez, M. & Bertozzi, D., 2010, Designing network-on-chip architectures in the nanoscale era. Flich, J. & Bertozzi, D. (eds.). s.l.: s.n., p. 90-133 43 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  26. Towards the performace analysis of reconfigurable hardwares in grid networks

    Ahmadi, M. & Nadeem, MF., 2010, 23rd Canadian conf. on electrical and computer engineering. s.n. (ed.). Los Alamitos, CA: IEEE Society, p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  27. Towards the utilization of reconfigurable processors in grid networks

    Nadeem, MF., Anjam, F., Ostadzadeh, SA., Ahmadi, M. & Wong, JSSM., 2010, Prorisc 2010. s.n. (ed.). Nederland: STW, p. 29-35 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  28. Trends and challenges of SRAM reliability in the nano-scale era

    Seyab, MSK. & Hamdioui, S., 2010, 2010 intl. conf. on design & technology of integrated systems in nanoscale Era. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  29. Using a CISC microcontroller to test embedded memories

    van de Goor, AJ., Hamdioui, S. & Gaydadjiev, GN., 2010, IEEE intl. symposium on design and diagnostics of electronic circuits and systems. s.n. (ed.). Piscataway: IEEE Society, p. 382-387 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  30. tQUAD-memory bandwith usage analysis

    Ostadzadeh, SA., Corina, M., Galuzzi, C. & Bertels, KLM., 2010, 39th intl. conf. on parallel processing workshops. s.n. (ed.). Piscataway: IEEE Society, p. 217-226 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  31. 2009
  32. 3-Tier reconfiguration model for FPGAs using hardwired network on chip

    Wahlah, MA. & Goossens, KGW., 2009, 2009 intl. conf. on field-programmable technology. Bergmann, N., Diessel, O. & Shannon, L. (eds.). Piscataway: IEEE Society, p. 504-509 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  33. A drift-reduced hierarchical wavelet coding scheme for scalable video transmissions

    Choupani, R., Wong, S. & Tolun, MR., 2009, The first international conference on advances in multimedia. Burdescu, DD., Crespi, N. & Dini, O. (eds.). Piscataway: IEEE Society, p. 68-73 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  34. A high-level debug environment for communication-centric debug

    Goossens, KGW., Vermeulen, B. & Beyranvand Nejad, A., 2009, Proceedings design, automation and test in Europa. s.n. (ed.). Piscataway: IEEE Society, p. 202-207 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  35. A high-throughput, area-efficient hardware accelerator for adaptive deblocking filter in H.264/AVC

    Nadeem, M., Wong, S., Kuzmanov, GK. & Shabbir, A., 2009, 2009 IEEE/ACM/IFIP 7th workshop on embedded for real-time multimedia. s.n. (ed.). Piscataway: IEEE Society, p. 18-27 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  36. A method and system for power management

    Molnos, AM. & Goossens, KGW., 2009, Patent No. WO 2009125371 A2, Priority date 15 Oct 2009

    Research output: PatentOther research output

  37. A multipurpose clustering algorithm for task partitioning in multicore reconfigurable systems

    Ostadzadeh, SA., Meeuws, RJ., Sigdel, K. & Bertels, K., 2009, The international conference on complex, intelligent and software intensive systems. s.n. (ed.). Piscataway: IEEE Society, p. 663-668 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  38. A new approach to implement discrete wavelet transform using collaboration of reconfigurable elements

    Shahbahrami, A., Ahmadi, M., Wong, S. & Bertels, K., 2009, 2009 intl. conf. on reconfigurable computing and FPGAs. s.n. (ed.). Piscataway: IEEE Society, p. 344-349 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  39. A novel fast online placement algorithm on 2D partially reconfigurable devices

    Thomas, TM., Lu, Y., Bertels, K. & Gaydadjiev, GN., 2009, 2009 intl. conf. on field-programmable technology. Bergmann, N., Diessel, O. & Shannon, L. (eds.). Piscataway: IEEE Society, p. 296-299 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  40. A reconfigurable beamformer for audio applications

    Theodoropoulos, D., Kuzmanov, GK. & Gaydadjiev, GN., 2009, 2009 IEEE 7th symposium on application specific processors. s.n. (ed.). Piscataway: IEEE Society, p. 80-87 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  41. A reverse converter for the new 4-moduli set {2n+3, 2n+2, 2n+1, 2n}

    Gbolagade, KA. & Cotofana, SD., 2009, 2009 IEEE international conference on electronics circuits and systems. s.n. (ed.). Piscataway: IEEE Society, p. 113-116 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  42. Adaptive clock scheduling for pipelined structures

    Kuiper, B. & Cotofana, SD., 2009, 2009 IEEE/ACM international symposium on nanoscale architectures. s.n. (ed.). Piscataway: IEEE Society, p. 65-68 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  43. Aelite: a flit-synchronous network on chip with composable and predictable services

    Hansson, A., Subburaman, M. & Goossens, KGW., 2009, Proceedings design, automation and test in Europa. s.n. (ed.). Piscataway: IEEE Society, p. 250-255 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  44. Agent toolkits for ad hoc grids

    Abdullah, MT. & Bertels, K., 2009, Proceedings of the 1st international workshop on distributed computing in ambient environments. Brimkmann, A., Eikerling, H-J. & Zaheer Aziz, M. (eds.). s.l.: s.n., p. 49-58 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  45. Algorithms for the automatic extension of an instruction-set

    Galuzzi, C., Theodoropoulos, D., Meeuws, RJ. & Bertels, K., 2009, Proceedings design, automation and test in Europa. s.n. (ed.). Piscataway: IEEE Society, p. 548-553 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  46. An economic framework for resource allocation in ad-hoc grids

    Pourebrahimi, B., 2009, 144 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  47. An efficient and high performance linear recursive variable expansion implementation of the Smith-Waterman algorithm

    Hasan, L. & Al-Ars, Z., 2009, 31st annual international conference of the IEEE engineering in medicine and biology society. s.n. (ed.). Piscataway: IEEE Society, p. 3845-3848 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  48. An efficient software cache for H.264 motion compensation

    Pereira de Azevedo Filho, AP. & Juurlink, B., 2009, 2009 international symposium on system-on-chip proceedings. s.n. (ed.). Piscataway: IEEE Society, p. 147-150 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  49. An o(n) residue number system to mixed radix conversion technique

    Gbolagade, KA. & Cotofana, SD., 2009, 2009 IEEE international symposium on circuits and systems. Piscataway: IEEE Society, p. 521-525 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  50. An on-chip interconnect and protocol stack for multiple communication paradigms and programming models

    Hansson, A. & Goossens, KGW., 2009, 7th IEEE/ACM intl. conf. on hardware/software codesign and system synthesis. s.n. (ed.). New York: Association for Computing Machinery (ACM), p. 99-108 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  51. Ant colony inspired microeconomic based resource management in ad hoc grids

    Abdullah, MT., Bertels, K. & Onana Alima, L., 2009, In : Lecture Notes in Computer Science. 5529, p. 189-198 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  52. Architecture design principles for the integration of synchronization interfaces into network-on-chip switches

    Ludovici, D., Strano, A. & Bertozzi, D., 2009, Second International workshop on network on chip architectures. s.n. (ed.). New York, NY, USA: Association for Computing Machinery (ACM), p. 31-36 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  53. Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints

    Ludovici, D., Gilabert, F., Medardoni, S., Gomez, C., Gomez, ME., Lopez, P., Gaydadjiev, GN. & Bertozzi, D., 2009, Proceedings design, automation and test in Europa. s.n. (ed.). Piscataway: IEEE Society, p. 562-565 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  54. Automatically fused instructions algorithm for the customization of the instruction-set of a reconfigurable architecture

    Galuzzi, C., 2009, Delft: s.n.. 170 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  55. CCproc: a custom VLIW cryptography co-processor for symmetric-key ciphers

    Theodoropoulos, D., Siskos, A. & Pnevmatikatos, DN., 2009, In : Lecture Notes in Computer Science. 5453, p. 318-323 6 p.

    Research output: Contribution to journalArticleScientificpeer-review

  56. Can SG-FET replace Fet in sleep mode circuits

    Enachescu, M., Cotofana, SD. & Tsamados, D., 2009, 4th international conference on Nano-Networks. s.n. (ed.). s.l.: s.n., p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  57. Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip

    Ludovici, D., Gaydadjiev, GN., Bertozzi, D. & Benini, L., 2009, Proceedings of the 2009 Great Lakes symposium on VLSI. s.n. (ed.). New York: Association for Computing Machinery (ACM), p. 125-128 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  58. CoMPSoC: a template for composable and predictable multi-processor system on chips

    Hansson, A., Goossens, KGW., Bekooij, M. & Huisken, J., 2009, In : ACM Transactions on Design Automation of Electronic Systems. 14, 1, p. 1-22 22 p.

    Research output: Contribution to journalArticleScientificpeer-review

  59. Comparing tightly and loosely coupled mesochronous synchronizers in a NoC switch architecture

    Ludovici, D., Strano, A., Bertozzi, D., Benini, L. & Gaydadjiev, GN., 2009, International Symposium on network-on-chip. s.n. (ed.). Piscataway: IEEE Society, p. 244-249 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  60. Compiler assisted runtime task scheduling on a reconfigurable computer

    Sabeghi, M., Sima, VM. & Bertels, K., 2009, 19th international conference on field programmable logic and applications. s.n. (ed.). Piscataway: IEEE Society, p. 44-50 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  61. Composable and persistent-state application swapping on FPGAs using hardwired network on chip

    Wahlah, MA. & Goossens, KGW., 2009, 2009 intl. conf. on reconfigurable computing and FPGAs. s.n. (ed.). Piscataway: IEEE Society, p. 380-385 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  62. Composable resource sharing based on latency-rate servers

    Akesson, B., Hansson, A. & Goossens, KGW., 2009, 12th Euromicro conference on digital system design architectures, methods and tools. Nunez, A. & Carballo, PP. (eds.). Piscataway: IEEE Society, p. 547-555 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  63. Compositional, dynamic cach management for embedded chip multiprocessors

    Molnos, AM., Cotofana, SD., Heijligers, MJM. & van Eijndhoven, JTJ., 2009, In : Journal of Signal Processing Systems: the journal of DSPtechnologies. 57, 2

    Research output: Contribution to journalArticleScientificpeer-review

  64. Conservative dynamic energy management for real-time dataflow applications mapped on multiple processors

    Molnos, AM. & Goossens, KGW., 2009, 12th Euromicro conference on digital system design architectures, methods and tools. Nunez, A. & Carballo, PP. (eds.). Piscataway: IEEE Society, p. 409-418 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  65. Data path configuration time reduction for run-time reconfigurable systems

    Fazlali, M., Zakerolhosseini, A., Sabeghi, M., Bertels, K. & Gaydadjiev, GN., 2009, The 2009 international conference on engineering of reconfigurable systems & algorithms. Plaks, T. (ed.). s.l.: CSREA Press, p. 323-327 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  66. Design and performance evaluation of an adaptive FPGA for network applications

    Kachris, C., Wong, S. & Vassiliadis, S., 2009, In : Microelectronics Journal. 40, 7, p. 1103-1110 8 p.

    Research output: Contribution to journalArticleScientificpeer-review

  67. Designing regular network-on-chip topologies under technology, architecture and software constraints

    Gilabert, F., Ludovici, D., Medardoni, S., Bertozzi, D., Benini, L. & Gaydadjiev, GN., 2009, 2009 International workshop on multi-core computing systems. s.n. (ed.). Piscataway: IEEE Society, p. 681-687 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  68. Distributed parallel scheduling algorithms for high speed virtual output queuing switches

    Mhamdi, LL. & Hamdi, M., 2009, IEEE symposium on computers and communications 2009. s.n. (ed.). Piscataway: IEEE Society, p. 944-949 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  69. Dynamic workload peak detection for slack management

    Milutinovic, A., Goossens, KGW. & Smit, GJM., 2009, 2009 international symposium on system-on-chip proceedings. s.n. (ed.). Piscataway: IEEE Society, p. 42-47 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  70. Efficient hardware generation for dynamic programming problems

    Nawaz, Z., Stefanov, TP. & Bertels, K., 2009, 2009 intl. conf. on field-programmable technology. Bergmann, N., Diessel, O. & Shannon, L. (eds.). Piscataway: IEEE Society, p. 348-352 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  71. Efficient multicast support in buffered crossbars using network on chip

    Varela Senin, I., Mhamdi, LL. & Goossens, KGW., 2009, 2009 IEEE Global telecommunications conference. s.n. (ed.). Piscataway: IEEE Society, p. 1-7 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  72. Efficient service allocation in hardware using credit-controlled static-priority arbitration

    Akesson, B., Steffens, L. & Goossens, KGW., 2009, 15th IEEE intl. conf. on embedded and real-time computing systems and applications. s.n. (ed.). Piscataway: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  73. Emerging non-CMOS nanoelectronic devices-What are they?

    Haron, NZB., Hamdioui, S. & Cotofana, SD., 2009, The 4th annual IEEE international conference on nano/micro engineered and molecular systems. s.n. (ed.). Piscataway: IEEE Society, p. 63-68 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  74. Enabling application-level performance guarantees in network-based systems on chip by applying dataflow analysis

    Hansson, A., Wiggers, M., Moonen, A., Goossens, KGW. & Bekooij, M., 2009, In : IET Computers and Digital Techniques. 3, 5, p. 398-412 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  75. Energy efficient branch prediction on the cell SPE

    Briejer, M., Meenderinck, CH. & Juurlink, B., 2009, 20th annual workshop on circuits, systems and signal processing. s.n. (ed.). Utrecht: STW, p. 445-450 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  76. Energy reduction techniques for caches and multiprocessors

    de Langen, PJ., 2009, Delft: s.n.. 140 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  77. Evaluating various branch-prediction schemes for biomedical-implant processors

    Strydis, C. & Gaydadjiev, GN., 2009, 20th IEEE international conference on application-specific systems, architectures and processors. n.s. (ed.). Piscataway: IEEE Society, p. 169-176 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  78. Fault diagnosis using test primitives in random access memories

    Al-Ars, Z. & Hamdioui, S., 2009, 18th Asian test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 403-408 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  79. Fault tolerance architecture for reliable hybrid CMOS/nanodevices memory

    Haron, NZB. & Hamdioui, S., 2009.

    Research output: Contribution to conferencePosterProfessional

  80. Flexible pipelining design for recursive variable expansion

    Nawaz, Z., Thomas, TM., Stefanov, TP. & Bertels, K., 2009, 23rd IEEE international parallel & distributed processing symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  81. High speed merged-datapath design for run-time reconfigurable systems

    Fazlali, M., Zakerolhosseini, A., Shahbahrami, A. & Gaydadjiev, GN., 2009, 2009 intl. conf. on field-programmable technology. Bergmann, N., Diessel, O. & Shannon, L. (eds.). Piscataway: IEEE Society, p. 339-343 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  82. Hybrid resource discovery mechanism in ad hoc grid using structured overlay

    Abdullah, MT., Onana Alima, L., Sokolov, S., Calomme, D. & Bertels, K., 2009, In : Lecture Notes in Computer Science. 5455, p. 108-119 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  83. Implementable building blocks for fluctuation based calculation in single electron tunneling technology

    Agbo, I., Safiruddin, S. & Cotofana, SD., 2009, 9th Nanotechnology conference. s.n. (ed.). Piscataway: IEEE Society, p. 450-453 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  84. Implementation of a reliable data bus for the Delfi nanosatellite programm

    Cornejo, N. E., Bouwmeester, J. & Gaydadjiev, GN., 2009, Proceedings of the 7th IAA Symposium on Small Satellites for Earth Observation. s.n (ed.). Berlin: International Academy of Astronautics, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  85. Improving soft error correction capability of 4-D parity codes

    Imran, M., Al-Ars, Z. & Gaydadjiev, GN., 2009, 14th European Test Symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  86. Improving soft error correction capability of 4-D parity codes

    Imran, M., Al-Ars, Z. & Gaydadjiev, GN., 2009.

    Research output: Contribution to conferencePosterProfessional

  87. Instruction precomputation for fault detection

    Borodin, D., Juurlink, B. & Kaxiras, S., 2009, 12th Euromicro conference on digital system design architecturs, methods and tools. s.n. (ed.). s.l.: s.n., p. 91-99 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  88. Internet-router buffered crossbars based on network on chip

    Goossens, KGW., Mhamdi, LL. & Varela Senin, I., 2009, 12th Euromicro conference on digital system design architectures, methods and tools. Nunez, A. & Carballo, PP. (eds.). Piscataway: IEEE Society, p. 365-374 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  89. Intra-vector SIMD instructions for core specialization

    Meenderinck, CH. & Juurlink, B., 2009, 2009 IEEE international conference on computer design. s.n. (ed.). Piscataway: IEEE Society, p. 479-484 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  90. K-loops: loop skewing for reconfigurable architectures

    Dragomir, OS. & Bertels, K., 2009, 2009 intl. conf. on field-programmable technology. Bergmann, N., Diessel, O. & Shannon, L. (eds.). Piscataway: IEEE Society, p. 199-206 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  91. K-stage pipelined bloom filter for packet classification

    Ahmadi, M. & Wong, S., 2009, The 7th IEEE/IFIP international conference on embedded and ubiquitous computing. s.n. (ed.). Piscataway: IEEE Society, p. 64-70 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  92. Limiting the number of dirty cache lines

    de Langen, PJ. & Juurlink, B., 2009, Proceedings design, automation and test in Europa. s.n. (ed.). Piscataway: IEEE Society, p. 670-675 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  93. Mapping KPN models of streaming applications on a network-on-chip platform

    Beyranvand Nejad, A., Goossens, KGW., Walters, J. & Kienhuis, B., 2009, 20th annual workshop on circuits, systems and signal processing. s.n. (ed.). Utrecht: STW, p. 441-444 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  94. Modeling reconfiguration in a FPGA with a hardwired network on chip

    Wahlah, MA. & Goossens, KGW., 2009, 23rd IEEE international parallel & distributed processing symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  95. Multipath routing in TDM NoCs

    Stefan, RA. & Goossens, KGW., 2009, 17th IFIP/IEEE international conference on very large scale integration. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  96. Multiple description scalable coding for video transmission over unreliable networks

    Choupani, R., Wong, S. & Tolun, MR., 2009, In : Lecture Notes in Computer Science. 5657, p. 58-67 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  97. New algorithms for address decoder delay faults and bit line imbalance faults

    van de Goor, AJ., Hamdioui, S., Gaydadjiev, GN. & Al-Ars, Z., 2009, 18th Asian test symposium. s.n. (ed.). Piscataway: IEEE Society, p. 391-395 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  98. NoC security using multipath routing

    Stefan, RA. & Goossens, KGW., 2009, 20th annual workshop on circuits, systems and signal processing. s.n. (ed.). Utrecht: STW, p. 522-525 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  99. Non-algorithmic stress optimization using simulation for DRAMs

    Al-Ars, Z. & Hamdioui, S., 2009, 4th Intl. design and test workshop 2009. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  100. On the integration of unicast and multicast cell scheduling in buffered crossbar switches

    Mhamdi, LL., 2009, In : IEEE Transactions on Parallel and Distributed Systems. 20, 6, p. 818-830 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  101. Online task scheduling for the FPGA-based partially reconfigurable systems

    Lu, Y., Thomas, TM., Bertels, K. & Gaydadjiev, GN., 2009, In : Lecture Notes in Computer Science. 5453, p. 216-230 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  102. OpenMP extensions for FPGA accelerators

    Cabrera, D., Martorell, X., Gaydadjiev, GN., Ayguade1, E. & Jimenez-Gonzalez, D., 2009, 2009 international conference on embedded computer systems: architectures, modeling and simulation. Najjar, W. & J Schulte, M. (eds.). Piscataway: IEEE Society, p. 17-24 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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