1. 2019
  2. In-memory database acceleration on FPGAs: a survey

    Fang, J., Mulder, Y. T. B., Hidders, J., Lee, J. & Hofstee, H. P., 2019, In : VLDB Journal.

    Research output: Contribution to journalArticleScientificpeer-review

  3. Mapping of Lattice Surgery-based Quantum Circuits on Surface Code Architectures

    Lao, L., van Wee, B., Ashraf, I., van Someren, J., Khammassi, N., Bertels, K. & Almudever, C. G., 2019, In : Quantum Science and Technology. 4, 1, p. 1-20 20 p., 015005.

    Research output: Contribution to journalArticleScientificpeer-review

  4. Methodology for Application-Dependent Degradation Analysis of Memory Timing

    Kraak, D., Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S. & Catthoor, F., 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE): Proceedings. IEEE, p. 162-167 6 p. 8715143

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  5. Non-Equilibrium Green Function-based Verilog-A Graphene Nanoribbon Model

    Jiang, Y., Laurenciu, N. C. & Cotofana, S. D., 2019, 2018 IEEE 18th International Conference on Nanotechnology (IEEE-NANO). Quinn, A., Li, G., Li, W. & Mathewson, A. (eds.). Piscataway, NJ, USA: IEEE, p. 1-4 4 p. 8626396

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  6. On Basic Boolean Function Graphene Nanoribbon Conductance Mapping

    Jiang, Y., Laurenciu, N. C. & Cotofana, S. D., 2019, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 66, 5, p. 1948-1959 12 p., 8574057.

    Research output: Contribution to journalArticleScientificpeer-review

  7. Pinhole Defect Characterization and Fault Modeling for STT-MRAM Testing

    Wu, L., Rao, S., Cardoso Medeiros, G., Taouil, M., Marinissen, E. J., Yasin, F., Couet, S., Hamdioui, S. & Kar, G. S., 2019, 2019 IEEE European Test Symposium (ETS): Proceedings. Danvers: IEEE, p. 1-6 6 p. 8791518

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  8. Quantum accelerated computer architectures

    Riesebos, L., Fu, X., Moueddenne, A. A., Lao, L., Varsamopoulos, S., Ashraf, I., Van Someren, J., Khammassi, N., Almudever, C. G. & Bertels, K., 2019, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Yasuura, H., Miyanaga, Y. & Kiya, H. (eds.). Piscataway, NJ, USA: Institute of Electrical and Electronics Engineers Inc., Vol. 2019-May. 4 p. 8702488

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. Rebooting Computing: The Challenges for Test and Reliability

    Bosio, A., O'Connor, I., Rodrigues, G. S., Lima, F. K., Vatajelu, E. I., di Natale, G., Anghel, L., Nagarajan, S., Fieback, M. C. R. & Hamdioui, S., 2019, 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. Rebooting Our Computing Models

    Cadareanu, P., Reddy C, N., Almudever, C. G., Khanna, A., Raychowdhury, A., Bertels, K., Narayanan, V., Di Ventra, M. & Gaillardon, P-E., 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE): Proceedings. IEEE, p. 1469-1476 8 p. 8715167

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. Refine and recycle: A method to increase decompression parallelism

    Fang, J., Chen, J., Lee, J., Al-Ars, Z. & Hofstee, H. P., 2019, 2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP): Proceedings. IEEE, p. 272-280 9 p. 8825015

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. Sense amplifier offset voltage analysis for both time-zero and time-dependent variability

    Agbo, I., Taouil, M., Kraak, D., Hamdioui, S., Weckx, P., Cosemans, S., Raghavan, P., Catthoor, F. & Dehaene, W., 2019, In : Microelectronics Reliability. 99, p. 52-61 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  13. Skeleton-based Synthesis Flow for Computation-In-Memory Architectures

    Yu, J., Nane, R., Ashraf, I., Taouil, M., Hamdioui, S., Corporaal, H. & Bertels, K., 2019, (Accepted/In press) In : IEEE Transactions on Emerging Topics in Computing. PP, p. 1-13 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  14. Software-Based Mitigation for Memory Address Decoder Aging

    Kraak, D., Gursoy, C. C., Agbo, I. O., Taouil, M., Jenihhin, M., Raik, J. & Hamdioui, S., 2019, 2019 IEEE Latin American Test Symposium (LATS). Danvers: IEEE, p. 1-6 6 p. 8704595

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  15. SparkGA2: Production-quality memory-efficient Apache Spark based genome analysis framework

    Mushtaq, H., Ahmed, N. & Al-Ars, Z., 2019, In : PLoS ONE. 14, 12, p. 1-14 14 p., e0224784.

    Research output: Contribution to journalArticleScientificpeer-review

  16. SparkJNI: A Toolchain for Hardware Accelerated Big Data Apache Spark

    Voicu, T. A. & Al-Ars, Z., 2019, 2019 4th IEEE International Conference on Big Data Analytics, ICBDA 2019. Guan, S-U., Zhang, K. & Cao, J. (eds.). Piscataway, NJ, USA: IEEE, p. 152-157 6 p. 8713201

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  17. Sparstition: A partitioning scheme for large-scale sparse matrix vector multiplication on FPGA

    Sigurbergsson, B., Hogervorst, T., Qiu, T. D. & Nane, R., 2019, 2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP): Proceedings. IEEE, p. 51-58 8 p. 8825125

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  18. Supporting Columnar In-memory Formats on FPGA: The Hardware Design of Fletcher for Apache Arrow

    Peltenburg, J., van Straten, J., Brobbel, M., Hofstee, H. P. & Al-Ars, Z., 2019, Applied Reconfigurable Computing: 15th International Symposium, ARC 2019, Proceedings. Hochberger, C., Koch, A., Diniz, P., Woods, R. & Nelson, B. (eds.). Cham: Springer Nature, p. 32-47 16 p. (Lecture Notes in Computer Science; vol. 11444 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  19. Time-division Multiplexing Automata Processor

    Yu, J., Du Nguyen, H. A., Abu Lebdeh, M., Taouil, M. & Hamdioui, S., 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) : Proceedings. IEEE, p. 794-799 6 p. 8715140

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  20. Towards Reliable and Secure Post-Quantum Co-Processors based on RISC-V

    Fritzmann, T., Sharif, U., Müller-Gritschneder, D., Reinbrecht, C., Schlichtmann, U. & Sepulveda, J., 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE): Proceedings . IEEE, p. 1148-1153 6 p. 8715173

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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