1. 2017
  2. Exploring ILP and TLP on a Polymorphic VLIW Processor

    Brandon, A., Hoozemans, J., van Straten, J. & Wong, S., 2017, Architecture of Computing Systems - ARCS 2017: 30th International Conference Proceedings. Knoop, J., Karl, W., Schulz, M., Inoue, K. & Pionteck, T. (eds.). Cham: Springer, p. 177-189 13 p. (Lecture Notes in Computer Science ; vol. 10172).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. Fast and accurate workload-level neural network based IC energy consumption estimation

    Cucu Laurenciu, N. & Cotofana, S., 2017, SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. IEEE, p. 1-4 4 p. 7981598

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  4. GPU-Accelerated GATK HaplotypeCaller with Load-Balanced Multi-Process Optimization

    Ren, S., Bertels, K. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 497-502 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  5. Haar-based interconnect coding for energy effective medium/long range data transport

    Cucu Laurenciu, N. & Cotofana, S., 2017, Proceedings - 30th IEEE International System on Chip Conference, SOCC 2017. Alioto, M., Li, H., Becker, J., Schlichtmann, U. & Sridhar, R. (eds.). Piscataway, NJ: IEEE, p. 375-380 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  6. High Performance Streaming Smith-Waterman Implementation with Implicit Synchronization on Intel FPGA using OpenCL

    Houtgast, E., Sima, V. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 492-496 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  7. Impact and Mitigation of Sense Amplifier Aging Degradation Using Realistic Workloads

    Kraak, D., Taouil, M., Agbo, I., Hamdioui, S., Weckx, P., Catthoor, F. & Cosemans, S., 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 12, p. 3464-3472 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  8. Integral Impact of BTI, PVT Variation, and Workload on SRAM Sense Amplifier

    Agbo, I., Taouil, M., Kraak, D., Hamdioui, S., Kükner, H., Weckx, P., Raghavan, P. & Catthoor, F., 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 4, p. 1444-1454 11 p., 7819518.

    Research output: Contribution to journalArticleScientificpeer-review

  9. Interconnect Networks for Resistive Computing Architectures

    Du Nguyen, H. A., Xie, L., Yu, J., Taouil, M. & Hamdioui, S., 2017, 2017 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS). Danvers: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. LDPC-Based Adaptive Multi-Error Correction for 3D Memories

    Lefter, M., Voicu, G., Marconi, T., Savin, V. & Cotofana, S., 2017, 2017 IEEE International Conference on Computer Design (ICCD). IEEE, Vol. Piscataway. p. 265-268 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. Low cost multi-error correction for 3D polyhedral memories

    Lefter, M., Marconi, T., Voicu, G. & Cotofana, S., 2017, 2017 IEEE/ACM International Symposium on Nanoscale Architectures. IEEE, p. 13-18 6 p. 8053722

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. Memristive devices: Technology, design automation and computing frontiers

    Barbareschi, M., Bosio, A., Du Nguyen, H. A., Hamdioui, S., Traiola, M. & Vatajelu, E. I., 2017, 2017 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS). Danvers: IEEE, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  13. Memristor For Computing: Myth or Reality?

    Hamdioui, S., Kvatinsky, S., Cauwenberghs, G., Xie, L., Wald, N., Joshi, S., Elsayed, H. M., Corporaal, H. & Bertels, K., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 722-731 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  14. Memristor based computation-in-memory architecture for big data

    Hamdioui, S., Taouil, M. & Bertels, K., 2017, IPC No. H03K; G06F, Priority date 7 Jul 2015, Priority No. WO 2017/007318

    Research output: PatentOther research output

  15. Mitigation of sense amplifier degradation using input switching

    Kraak, D., Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Catthoor, F. & Dehaene, W., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 858-863 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  16. Moving workloads to a better place: Optimizing computer architectures for data-intensive applications

    Vermij, E., 2017, 189 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  17. On the Implementation of Computation-in-Memory Parallel Adder

    Du Nguyen, H. A., Xie, L., Taouil, M., Nane, R., Hamdioui, S. & Bertels, K., 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 8, p. 2206 - 2219 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  18. On the Robustness of Memristor Based Logic Gates

    Xie, L., Du Nguyen, H. A., Yu, J., Taouil, M. & Hamdioui, S., 2017, 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Dietrich, M. & Novak, O. (eds.). Piscataway: IEEE, p. 158-163 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  19. Pauli Frames for Quantum Computer Architectures

    Riesebos, L., Fu, X., Varsamopoulos, S., García Almudever, C. & Bertels, K., 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Aitken, R. & Li, Z. (eds.). New York: Association for Computing Machinery (ACM), p. 1-6 76

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  20. Predictive Genome Analysis Using Partial DNA Sequencing Data

    Ahmed, N., Bertels, K. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 119-124 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  21. Pushing Big Data into Accelerators: Can the JVM Saturate Our Hardware?

    Peltenburg, J. W., Hesam, A. & Al-Ars, Z., 2017, High Performance Computing: ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers. Kunkel, J. M., Yokota, R., Taufer, M. & Shalf, J. (eds.). Cham: Springer, p. 220-236 16 p. (Lecture Notes in Computer Science; vol. 10524).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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