1. 2018
  2. Hardware acceleration of BWA-MEM genomic short read mapping for longer read lengths

    Houtgast, E. J., Sima, V-M., Bertels, K. & Al-Ars, Z., 2018, In : Computational Biology and Chemistry. 75, p. 54-64 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  3. ISA-DTMR: Selective Protection in Configurable Heterogeneous Multicores

    Erichsen, A. G., Sartor, A. L., Souza, J. D., Pereira, M. M., Wong, S. & Beck, A. C. S., 2018, Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings. Voros, N., Huebner, M., Keramidas, G., Goehringer, D., Antonpoulos, C. & Diniz, P. C. (eds.). Cham: Springer, p. 231-242 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 10824 ).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  4. Impact and mitigation of SRAM read path aging

    Agbo, I., Taouil, M., Kraak, D., Hamdioui, S., Weckx, P., Cosemans, S., Catthoor, F. & Dehaene, W., 2018, In : Microelectronics Reliability. 87, p. 158-167 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  5. Industrial Evaluation of Transition Fault Testing for Cost Effective Offline Adaptive Voltage Scaling

    Zandrahimi, M., Debaud, P., Castillejo, A. & Al-Ars, Z., 2018, Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE): Proceedings. IEEE, p. 289-292 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  6. Ionizing radiation modeling in DRAM transistors

    Fieback, M., Taouil, M., Hamdioui, S. & Rovatti, M., 2018, 2018 IEEE 19th Latin-American Test Symposium, LATS 2018. IEEE, Vol. 2018-January. p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  7. Low power IC design characterization techniques under process variations

    Zandrahimi, M., 2018, 71 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  8. Low-Leakage 3D Stacked Hybrid NEMFET-CMOS Dual Port Memory

    Enachescu, M., Lefter, M., Voicu, G. & Cotofana, S., 2018, In : IEEE Transactions on Emerging Topics in Computing. 6, 2, p. 184-199 16 p.

    Research output: Contribution to journalArticleScientificpeer-review

  9. Memory and Communication Profiling for Accelerator-Based Platforms

    Ashraf, I., Khammassi, N., Taouil, M. & Bertels, K., 2018, In : IEEE Transactions on Computers. 67, 7, p. 934-948 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  10. Memristive Device for Logic Design and Computing

    Xie, L., 2018, 109 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  11. Memristive devices for computation-in-memory

    Yu, J., Du Nguyen, H. A., Xie, L., Taouil, M. & Hamdioui, S., 2018, Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE): Proceedings. IEEE, p. 1646-1651 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  12. On Carving Basic Boolean Functions on Graphene Nanoribbons Conduction Maps

    Jiang, Y., Cucu Laurenciu, N. & Cotofana, S., 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS) : Proceedings. Piscataway, NY: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  13. On Effective Graphene Based Computing

    Laurenciu, N. C. & Cotofana, S. D., 2018, 2018 41st International Semiconductor Conference, CAS 2018 - Proceedings. Dinescu, M. A., Dobrescu, D., Muller, A., Cristea, D., Dragoman, M., Muller, R., Ciurea, M. L., Neculoiu, D. & Brezeanu, G. (eds.). Piscataway, NJ, USA: Institute of Electrical and Electronics Engineers (IEEE), Vol. 2018-October. p. 51-58 8 p. 8539757

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  14. On Leveraging Vertical Proximity in 3D Memory Hierarchies

    Lefter, M., 2018, 147 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  15. Porting and Benchmarking of BWAKIT Pipeline on OpenPOWER Architecture

    Kathiresan, N., Al-Ali, R., Jithesh, P., Narayanasamy, G. & Al-Ars, Z., 2018, High Performance Computing : ISC High Performance 2018 International Workshops, Revised Selected Papers. Yokota, R., Weiland, M., Shalf, J. & Alam, S. (eds.). Cham: Springer, p. 402-410 9 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 11203 ).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  16. Quantum Control Architecture: Bridging the Gap between Quantum Software and Hardware

    Fu, X., 2018, 156 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  17. Reliability Modeling and Mitigation for Embedded Memories

    Agbo, I., 2018, 137 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  18. Targeting static and dynamic workloads with a reconfigurable VLIW processor

    Hoozemans, J., 2018, 161 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  19. Testing Resistive Memories: Where Are We and What Is Missing?

    Fieback, M., Taouil, M. & Hamdioui, S., 2018, International Test Conference 2018 - Proceedings. Piscataway, NJ: IEEE, p. 1-9 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  20. Towards a Scalable Quantum Computer

    Almudever, C. G., Khammassi, N., Hutin, L., Vinet, M., Babaie, M., Sebastiano, F., Charbon, E. & Bertels, K., 2018, Proceedings - 2018 13th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2018. Piscataway, NJ: IEEE, 1 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  21. 2017
  22. GPU Accelerated API for Alignment of Genomics Sequencing Data

    Ahmed, N., Mushtaq, H., Bertels, K. & Al-Ars, Z., Nov 2017, 2017 IEEE International Conference on Bioinformatics and Biomedicine (BIBM). Hu, X., Shyu, C. R., Bromberg, Y., Gao, J., Gong, Y., Korkin, D., Yoo, I. & Zheng, J. H. (eds.). Danvers: IEEE, p. 510-515 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  23. An experimental microarchitecture for a superconducting qantum processor

    Fu, X., Rol, M. A., Bultink, C. C., Van Someren, J., Khammassi, N., Ashraf, I., Vermeulen, R. F. L., De Sterke, J. C., Vlothuizen, W. J., Schouten, R. N., García Almudever, C., DiCarlo, L. & Bertels, K., 14 Oct 2017, MICRO 2017 - 50th Annual IEEE/ACM International Symposium on Microarchitecture Proceedings. IEEE, Vol. Part F131207. p. 813-825 13 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  24. Using a Polymorphic VLIW Processor to Improve Schedulability and Performance for Mixed-criticality Systems

    Hoozemans, J., van Straten, J. & Wong, S., Aug 2017, 2017 IEEE 23rd International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA). Danvers: IEEE, p. 1-9 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  25. Restless Tuneup of High-Fidelity Qubit Gates

    Rol, M. A., Bultink, C. C., O'Brien, T. E., De Jong, S. R., Theis, L. S., Fu, X., Luthi, F., Vermeulen, R. F. L., De Sterke, J. C., Bruno, A., Deurloo, D., Schouten, R. N., Wilhelm, F. K. & Dicarlo, L., 24 Apr 2017, In : Physical Review Applied. 7, 4, 041001.

    Research output: Contribution to journalArticleScientificpeer-review

  26. Improved Dynamic Cache Sharing for Communicating Threads on a Runtime-Adaptable Processor

    Hoozemans, J., Lorenzon, A., Schneider Beck, A. C. & Wong, S., Jan 2017, p. 1-9. 9 p.

    Research output: Contribution to conferenceAbstractScientific

  27. A Domain-Specific Language and Compiler for Computation-in-Memory Skeletons

    Yu, J., Hogervorst, T. & Nane, R., 2017, GLSVLSI '17 Proceedings of the on Great Lakes Symposium on VLSI 2017 . New York: Association for Computing Machinery (ACM), p. 71-76 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  28. An experience with Chalcogenide memristors, and implications on memory and computer applications

    Escudero-López, M., Amat, E., Rubio, A. & Pouyan, P., 2017, 2016 Conference on Design of Circuits and Integrated Systems (DCIS). Piscataway, NJ: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  29. BrainFrame: A node-level heterogeneous accelerator platform for neuron simulations

    Smaragdos, G., Chatzikonstantis, G., Kukreja, R., Sidiropoulos, H., Rodopoulos, D., Sourdis, I., Al-Ars, Z., Kachris, C., Soudris, D., De Zeeuw, C. I. & Strydis, C., 2017, In : Journal of Neural Engineering. 14, 6, p. 1-15 15 p., 066008.

    Research output: Contribution to journalArticleScientificpeer-review

  30. Computing device for "big data" applications using memristors

    Hamdioui, S., Taouil, M. & Bertels, K., 2017, IPC No. G11C, Patent No. US 9,824,753, Priority date 21 Oct 2015

    Research output: PatentOther research output

  31. Computing device for "big data" applications using memristors

    Hamdioui, S., Taouil, M. & Bertels, K., 2017, IPC No. G11C, Priority date 21 Oct 2015, Priority No. US 2017/0117041

    Research output: PatentOther research output

  32. Exploiting Idle Hardware to Provide Low Overhead Fault Tolerance for VLIW Processors

    Sartor, A. L., Lorenzon, A. F., Carro, L., Kastensmidt, F., Wong, S. & Beck, A. C. S., 2017, In : ACM Journal on Emerging Technologies in Computing Systems. 13, 2, p. 13:1-13:21 21 p.

    Research output: Contribution to journalSpecial issueScientificpeer-review

  33. Exploring ILP and TLP on a Polymorphic VLIW Processor

    Brandon, A., Hoozemans, J., van Straten, J. & Wong, S., 2017, Architecture of Computing Systems - ARCS 2017: 30th International Conference Proceedings. Knoop, J., Karl, W., Schulz, M., Inoue, K. & Pionteck, T. (eds.). Cham: Springer, p. 177-189 13 p. (Lecture Notes in Computer Science ; vol. 10172).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  34. Fast and accurate workload-level neural network based IC energy consumption estimation

    Cucu Laurenciu, N. & Cotofana, S., 2017, SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. IEEE, p. 1-4 4 p. 7981598

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  35. GPU-Accelerated GATK HaplotypeCaller with Load-Balanced Multi-Process Optimization

    Ren, S., Bertels, K. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 497-502 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  36. Haar-based interconnect coding for energy effective medium/long range data transport

    Cucu Laurenciu, N. & Cotofana, S., 2017, Proceedings - 30th IEEE International System on Chip Conference, SOCC 2017. Alioto, M., Li, H., Becker, J., Schlichtmann, U. & Sridhar, R. (eds.). Piscataway, NJ: IEEE, p. 375-380 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  37. High Performance Streaming Smith-Waterman Implementation with Implicit Synchronization on Intel FPGA using OpenCL

    Houtgast, E., Sima, V. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 492-496 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  38. Impact and Mitigation of Sense Amplifier Aging Degradation Using Realistic Workloads

    Kraak, D., Taouil, M., Agbo, I., Hamdioui, S., Weckx, P., Catthoor, F. & Cosemans, S., 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 12, p. 3464-3472 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  39. Integral Impact of BTI, PVT Variation, and Workload on SRAM Sense Amplifier

    Agbo, I., Taouil, M., Kraak, D., Hamdioui, S., Kükner, H., Weckx, P., Raghavan, P. & Catthoor, F., 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 4, p. 1444-1454 11 p., 7819518.

    Research output: Contribution to journalArticleScientificpeer-review

  40. Interconnect Networks for Resistive Computing Architectures

    Du Nguyen, H. A., Xie, L., Yu, J., Taouil, M. & Hamdioui, S., 2017, 2017 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS). Danvers: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  41. LDPC-Based Adaptive Multi-Error Correction for 3D Memories

    Lefter, M., Voicu, G., Marconi, T., Savin, V. & Cotofana, S., 2017, 2017 IEEE International Conference on Computer Design (ICCD). IEEE, Vol. Piscataway. p. 265-268 4 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  42. Low cost multi-error correction for 3D polyhedral memories

    Lefter, M., Marconi, T., Voicu, G. & Cotofana, S., 2017, 2017 IEEE/ACM International Symposium on Nanoscale Architectures. IEEE, p. 13-18 6 p. 8053722

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  43. Memristive devices: Technology, design automation and computing frontiers

    Barbareschi, M., Bosio, A., Du Nguyen, H. A., Hamdioui, S., Traiola, M. & Vatajelu, E. I., 2017, 2017 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS). Danvers: IEEE, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  44. Memristor For Computing: Myth or Reality?

    Hamdioui, S., Kvatinsky, S., Cauwenberghs, G., Xie, L., Wald, N., Joshi, S., Elsayed, H. M., Corporaal, H. & Bertels, K., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 722-731 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  45. Memristor based computation-in-memory architecture for big data

    Hamdioui, S., Taouil, M. & Bertels, K., 2017, IPC No. H03K; G06F, Priority date 7 Jul 2015, Priority No. WO 2017/007318

    Research output: PatentOther research output

  46. Mitigation of sense amplifier degradation using input switching

    Kraak, D., Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Catthoor, F. & Dehaene, W., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 858-863 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  47. Moving workloads to a better place: Optimizing computer architectures for data-intensive applications

    Vermij, E., 2017, 189 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  48. On the Implementation of Computation-in-Memory Parallel Adder

    Du Nguyen, H. A., Xie, L., Taouil, M., Nane, R., Hamdioui, S. & Bertels, K., 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 8, p. 2206 - 2219 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  49. On the Robustness of Memristor Based Logic Gates

    Xie, L., Du Nguyen, H. A., Yu, J., Taouil, M. & Hamdioui, S., 2017, 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Dietrich, M. & Novak, O. (eds.). Piscataway: IEEE, p. 158-163 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  50. Pauli Frames for Quantum Computer Architectures

    Riesebos, L., Fu, X., Varsamopoulos, S., García Almudever, C. & Bertels, K., 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Aitken, R. & Li, Z. (eds.). New York: Association for Computing Machinery (ACM), p. 1-6 76

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  51. Predictive Genome Analysis Using Partial DNA Sequencing Data

    Ahmed, N., Bertels, K. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 119-124 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  52. Pushing Big Data into Accelerators: Can the JVM Saturate Our Hardware?

    Peltenburg, J. W., Hesam, A. & Al-Ars, Z., 2017, High Performance Computing: ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers. Kunkel, J. M., Yokota, R., Taufer, M. & Shalf, J. (eds.). Cham: Springer, p. 220-236 16 p. (Lecture Notes in Computer Science; vol. 10524).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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