1. 2017
  2. Pushing Big Data into Accelerators: Can the JVM Saturate Our Hardware?

    Peltenburg, J. W., Hesam, A. & Al-Ars, Z., 2017, High Performance Computing: ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers. Kunkel, J. M., Yokota, R., Taufer, M. & Shalf, J. (eds.). Cham: Springer, p. 220-236 16 p. (Lecture Notes in Computer Science; vol. 10524).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  3. QX: A high-performance quantum computer simulation platform

    Khammassi, N., Ashraf, I., Fu, X., García Almudever, C. & Bertels, K., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 464-469 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  4. Reliability Aware Computing Platforms Design and Lifetime Management

    Cucu Laurenciu, N., 2017, 132 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  5. Reliability issues in RRAM ternary memories affected by variability and aging mechanisms

    Rubio, A., Escudero, M. & Pouyan, P., 2017, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS). Piscataway, NJ: IEEE, p. 90-92 3 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  6. Resistive Random Access Memory Variability and Its Mitigation Schemes

    Pouyan, P., Amat, E., Hamdioui, S. & Rubio, A., 2017, In : Journal of Low Power Electronics. 13, 1, p. 124-134 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  7. Scalable Video Coding

    Choupani, R., 2017, 103 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  8. Scouting Logic: A Novel Memristor-Based Logic Design for Resistive Computing

    Xie, L., Du Nguyen, H. A., Yu, J., Kaichouhi, A., Taouil, M., AlFailakawi, M. & Hamdioui, S., 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). Hübner, M., Reis, R., Stan, M. & Voros, N. (eds.). Piscataway: IEEE, p. 176-181 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  9. SparkGA: A Spark Framework for Cost Effective, Fast and Accurate DNA Analysis at Scale

    Mushtaq, H., Liu, F., Costa, C., Liu, G., Hofstee, P. & Al-Ars, Z., 2017, ACM-BCB '17 Proceedings of the 8th ACM International Conference on Bioinformatics, Computational Biology,and Health Informatics . New York: Association for Computing Machinery (ACM), p. 148-157 10 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  10. Standards-based tools and services for building lifelong learning pathways

    Sgouropoulou, C., Voyiatzis, I., Koutoumanos, A., Hamdioui, S., Pouyan, P., Comte, M., Prinetto, P., Airò Farulla, G., Ellervee, P., Delgado Kloos, C. & Crespo Garcia, R., 2017, 2017 IEEE Global Engineering Education Conference (EDUCON). Piscataway, NJ: IEEE, p. 1619-1621 3 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  11. State of the Art and Challenges for Test and Reliability of Emerging Non-volatile Resistive Memories

    Vatajelu, E. I., Pouyan, P. & Hamdioui, S., 2017, In : International Journal of Circuit Theory and Applications. p. 1-25 25 p.

    Research output: Contribution to journalArticleScientificpeer-review

  12. Streaming Distributed DNA Sequence Alignment Using Apache Spark

    Mushtaq, H., Ahmed, N. & Al-Ars, Z., 2017, 2017 IEEE 17th International Conference on BioInformatics and BioEngineering (BIBE). Piscataway: IEEE, p. 188-193 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  13. Test and Reliability of Emerging Non-Volatile Memories

    Hamdioui, S., Pouyan, P., Li, H., Wang, Y., Raychowdhur, A. & Yoon, I., 2017, 2017 IEEE 26th Asian Test Symposium (ATS). O’Conner, L. (ed.). Piscataway, NJ : IEEE, p. 170-178 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  14. The engineering challenges in quantum computing

    García Almudever, C., Lao, L., Fu, X., Khammassi, N., Ashraf, I., Iorga, D., Varsamopoulos, S., Eichler, C., Wallraff, A., Geck, L., Kruth, A., Knoch, J., Bluhm, H. & Bertels, K., 2017, Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, p. 836-845

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  15. Towards Maximum Utilization of Remained Bandwidth in Defected NoC Links

    Chen, C., Fu, Y. & Cotofana, S., 2017, In : IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 36, 2, p. 285-298 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  16. Towards Real-Time Whisker Tracking in Rodents for Studying Sensorimotor Disorders

    Ma, Y., Ramakrishnan Geethakumari, P., Smaragdos, G., Lindeman, S., Romano, V., Negrello, M., Sourdis, I., Bosman, L. W. J., De Zeeuw, C. I., Al-Ars, Z. & Strydis, C., 2017, 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVII). Patt, Y. & Nandy, S. K. (eds.). Red Hook, NY: IEEE, p. 137-145 9 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  17. Transition Fault Testing for Offline Adaptive Voltage Scaling

    Zandrahimi, M., Debaud, P., Castillejo, A. & Al-Ars, Z., 2017, p. 1-1. 1 p.

    Research output: Contribution to conferencePosterScientific

  18. Using Transition Fault Test Patterns for Cost Effective Offline Performance Estimation

    Zandrahimi, M., Debaud, P., Castillejo, A. & Al-Ars, Z., 2017, 2017 12th International Conference on Design &Technology of Integrated Systems in Nanoscale Era (DTIS). Danvers: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  19. VLIW-Based FPGA Computation Fabric with Streaming Memory Hierarchy for Medical Imaging Applications

    Hoozemans, J., Heij, R., van Straten, J. & Al-Ars, Z., 2017, Applied Reconfigurable Computing: 13th International Symposium, ARC 2017. Wong, S., Beck, A. C., Bertels, K. & Carro, L. (eds.). Cham: Springer, p. 36-43 8 p. (Lecture Notes in Computer Science; vol. 10216)(Theoretical Computer Science and General Issues; vol. 10216).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  20. 2016
  21. A Comparison of Seed-and-Extend Techniques in Modern DNA Read Alignment Algorithms

    Ahmed, N., Bertels, K. & Al-Ars, Z., Dec 2016, 2016 IEEE International Conference on Bioinformatics and Biomedicine (BIBM). Tian, T., Jiang, Q., Liu, Y., Burrage, K., Song, J., Wang, Y., Hu, X., Morishita, S., Zhu, Q. & Wang, G. (eds.). Piscataway, NJ: IEEE, p. 1421-1428 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  22. Maximizing Systolic Array Efficiency to Accelerate the PairHMM Forward Algorithm

    Peltenburg, J., Ren, S. & Al-Ars, Z., Dec 2016, Proceedings - 2016 IEEE International Conference on Bioinformatics and Biomedicine (BIBM). Tian, T., Jiang, Q., Liu, Y., Burrage, K., Song, J., Wang, Y., Hu, X., Morishita, S., Zhu, Q. & Wang, G. (eds.). Piscataway, NJ: IEEE, p. 758-762 5 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  23. Power-Efficiency Analysis of Accelerated BWA-MEM Implementations on Heterogeneous Computing Platforms

    Houtgast, E. J., Sima, V-M., Marchiori, G., Bertels, K. & Al-Ars, Z., Dec 2016, 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig). Athanas, P., Cumplido, R., Feregrino, C. & Sass, R. (eds.). Danvers, MA: IEEE, p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  24. Active Resonator Reset in the Nonlinear Dispersive Regime of Circuit QED

    Bultink, C. C., Rol, M. A., O'Brien, T. E., Fu, X., Dikken, B. C. S., Dickel, C., Vermeulen, R. F. L., De Sterke, J. C., Bruno, A., Schouten, R. N. & DiCarlo, L., 13 Sep 2016, In : Physical Review Applied. 6, 3, p. 1-10 034008.

    Research output: Contribution to journalArticleScientificpeer-review

  25. High-performance, Cost-effective 3D Stacked Wide-Operand Adders

    Voicu, G. R. & Cotofana, S. D., 4 Aug 2016, In : IEEE Transactions on Emerging Topics in Computing. 5, 2, p. 179-192 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  26. Adaptive ILP Control to increase Fault Tolerance for VLIW Processors

    Sartor, A. L., Wong, S. & Beck, A. C. S., Jul 2016, Application-specific Systems, Architectures and Processors (ASAP), 2016 IEEE 27th International Conference on. London, UK: IEEE, p. 9-16 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  27. Communication Driven Mapping of Applications on Multicore Platforms

    Ashraf, I., 28 Apr 2016, 107 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  28. Hybrid NEMS-CMOS Architectures for Ultra Low Power Smart Systems: Architectures for Ultra Low Power Smart Systems

    Enachescu, M., 12 Apr 2016, 155 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  29. Heterogeneous hardware/software acceleration of the BWA-MEM DNA alignment algorithm

    Ahmed, N., Sima, VM., Houtgast, E., Bertels, K. & Al-Ars, Z., 7 Jan 2016, Proceedings of the 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD. Marculescu, D. & Lim, F. (eds.). Piscataway, NJ, USA: IEEE Society, p. 240-246 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  30. A Sparse VLIW Instruction Encoding Scheme Compatible with Generic Binaries

    Brandon, A., Hoozemans, J., van Straten, J., Lorenzon, A., Sartor, A., Schneider Beck Filho, A. C. & Wong, S., Jan 2016. 1 p.

    Research output: Contribution to conferenceAbstractScientific

  31. A Heterogeneous Quantum Computer Architecture

    Fu, X., Riesebos, L., Lao, L., García Almudever, C., Sebastiano, F., Versluis, R., Charbon, E. & Bertels, K., 2016, Proceedings of the ACM International Conference on Computing Frontiers, CF '16. New York: Association for Computing Machinery (ACM), p. 323-330 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  32. A Locality-Aware Hash-Join Algorithm

    Fang, J., Hidders, J., Bertels, K., Lee, J. & Hofstee, P., 2016, p. 1-4. 4 p.

    Research output: Contribution to conferenceAbstractScientific

  33. A Supply Voltage-dependent Variation Aware Reliability Evaluation Model

    Yang, B., Popovici, E., Quille, M. A., Amann, A. & Cotofana, S., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 79-84 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  34. A Survey and Evaluation of FPGA High-Level Synthesis Tools

    Nane, R., Sima, VM., Pilato, C., Choi, J., Fort, B., Canis, A., Chen, YT., Hsiao, H., Brown, S., Ferrandi, F., Anderson, J. & Bertels, K., 2016, In : IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 35, 10, p. 1591-1604 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  35. Alternative architectures toward reliable memristive crossbar memories

    Vourkas, I., Stathis, D., Sirakoulis, G. C. & Hamdioui, S., 2016, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 1, p. 206-217 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  36. An Efficient GPU-Accelerated Implementation of Genomic Short Read Mapping with BWA-MEM

    Houtgast, E., Sima, V., Bertels, K. & Al-Ars, Z., 2016, In : SIGARCH Computer Architecture News. 44, 4, p. 38-43 6 p.

    Research output: Contribution to journalArticleScientific

  37. An Image Processing VLIW Architecture for Real-Time Depth Detection

    Iorga, D., Nane, R., Lu, Y., van Dalen, E. & Bertels, K., 2016, Proceedings - 28th IEEE International Symposium on Computer Architecture and High Performance Computing: SBAC-PAD 2016. Baldassin, A. (ed.). Piscataway: IEEE, p. 158-165 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  38. An approach for digital Circuit Error/Reliability Propagation Analysis based on Conditional Probability

    Yang, B., Grandhi, S., Spagnol, C., Popovici, E. & Cotofana, S., 2016, Proceedings - 27th Irish Signals and Systems Conference. Curran, K. (ed.). Piscataway, NJ: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  39. Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector

    Kritchallo, V., Braithwaite, B., Vermij, E., Bertels, K. & Al-Ars, Z., 2016, Architecture of Computing Systems- ARCS 2016: Proceedings of the 29th International Conference on Architecture of Computing Systems. Hannig, F., Cardoso, J. M. P., Pionteck, T., Fey, D., Schröder-Preikschat, W. & Teich, J. (eds.). Cham: Springer, p. 251-262 12 p. (Lecture Notes in Computer Science; vol. 9367).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  40. Boolean Logic Gate Exploration for Memristor Crossbar

    Xie, L., Du Nguyen, H. A., Taouil, M., Hamdioui, S. & Bertels, K., 2016, Proceedings - 11th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016. Danvers, MA: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  41. Brownian Circuits: Designs

    Lee, J., Peper, F., Cotofana, S., Naruse, M., Ohtsu, M., Kawazoe, T., Takahashi, Y., Shimokawa, T., Kish, L. B. & Kubota, T., 2016, In : International Journal of Unconventional Computing. 12, 5-6, p. 341-362 22 p.

    Research output: Contribution to journalArticleScientificpeer-review

  42. CIM100x: Computation in-Memory Architecture Based on Resistive Devices

    Hamdioui, S., Taouil, M., Du Nguyen, H. A., Haron, A., Xie, L. & Bertels, K., 2016, Proceedings of CNNA 2016: 15th International Workshop on Cellular Nanoscale and their Applications. Berlin: VDE, p. 95-96 2 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  43. Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation

    Zandrahimi, M., Al-Ars, Z., Debaud, P. & Castillejo, A., 2016, Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. Teich, J. (ed.). Piscataway, NJ: IEEE, p. 1018-1019 2 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  44. Comparative BTI Analysis for Various Sense Amplifier Designs

    Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Raghavan, P. & Catthoor, F., 2016, Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016. IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  45. Computational Challenges of Next Generation Sequencing Pipelines Using Heterogeneous Systems

    Houtgast, E., Sima, V., Bertels, K. & Al-Ars, Z., 2016, p. 1-4. 4 p.

    Research output: Contribution to conferenceAbstractScientific

  46. CryoCMOS Hardware Technology: A Classical Infrastructure for a Scalable Quantum Computer

    Homulle, H., Visser, S., Patra, B., Ferrari, G., Prati, E., García Almudever, C., Bertels, K., Sebastiano, F. & Charbon, E., 2016, 2016 Proceedings of the ACM International Conference on Computing Frontiers. New York, NY: Association for Computing Machinery (ACM), p. 282-287 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  47. Drift-free video coding for privacy protected video scrambling

    Choupani, R., Wong, S. & Tolun, M., 2016, 10th International Conference on Information, Communications and Signal Processing, ICICS 2015. Piscataway, NJ: IEEE, p. 1-5 5 p. 7459830

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  48. Editorial Note on Memristor Models, Circuits and Architectures

    Sirakoulis, G. C. & Hamdioui, S., 2016, In : International Journal of Unconventional Computing. 12, 4, p. 247-250 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  49. Error Correction Code protected Data Processing Units

    Cucu Laurenciu, N., Gupta, T., Savin, V. & Cotofana, S., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 37-42 6 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  50. Exploration of Alternative GPU Implementations of the Pair-HMMs Forward Algorithm

    Ren, S., Bertels, K. & Al-Ars, Z., 2016, Proceedings 3rd International Workshop on High Performance Computing on Bioinformatics. p. 1-8 8 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

  51. Flexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing Units

    Nguyen-Ly, T. T., Gupta, T., Pezzin, M., Savin, V., Declercq, D. & Cotofana, S., 2016, Proceedings - 19th Euromicro Conference on Digital System Design (DSD 2016). Kitsos, P. (ed.). Piscataway: IEEE, p. 230-237 7 p.

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  52. GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing

    Houtgast, E., Sima, V., Bertels, K. & Al-Ars, Z., 2016, Proceedings - 29th International Conference on Architecture of Computing Systems, ARCS 2016. Hannig, F., Cardoso, J. M. P., Pionteck, T., Fey, D., Schröder-Preikschat, W. & Teich, J. (eds.). Springer, p. 130-142 13 p. (Lecture Notes in Computer Science; vol. 9637).

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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