1. 2016
  2. A Supply Voltage-dependent Variation Aware Reliability Evaluation Model

    Yang, B., Popovici, E., Quille, M. A., Amann, A. & Cotofana, S., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 79-84 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. A Survey and Evaluation of FPGA High-Level Synthesis Tools

    Nane, R., Sima, VM., Pilato, C., Choi, J., Fort, B., Canis, A., Chen, YT., Hsiao, H., Brown, S., Ferrandi, F., Anderson, J. & Bertels, K., 2016, In : IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 35, 10, p. 1591-1604 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  4. Alternative architectures toward reliable memristive crossbar memories

    Vourkas, I., Stathis, D., Sirakoulis, G. C. & Hamdioui, S., 2016, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 1, p. 206-217 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  5. An Efficient GPU-Accelerated Implementation of Genomic Short Read Mapping with BWA-MEM

    Houtgast, E., Sima, V., Bertels, K. & Al-Ars, Z., 2016, In : SIGARCH Computer Architecture News. 44, 4, p. 38-43 6 p.

    Research output: Contribution to journalArticleScientific

  6. An Image Processing VLIW Architecture for Real-Time Depth Detection

    Iorga, D., Nane, R., Lu, Y., van Dalen, E. & Bertels, K., 2016, Proceedings - 28th IEEE International Symposium on Computer Architecture and High Performance Computing: SBAC-PAD 2016. Baldassin, A. (ed.). Piscataway: IEEE, p. 158-165 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  7. An approach for digital Circuit Error/Reliability Propagation Analysis based on Conditional Probability

    Yang, B., Grandhi, S., Spagnol, C., Popovici, E. & Cotofana, S., 2016, Proceedings - 27th Irish Signals and Systems Conference. Curran, K. (ed.). Piscataway, NJ: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  8. Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector

    Kritchallo, V., Braithwaite, B., Vermij, E., Bertels, K. & Al-Ars, Z., 2016, Architecture of Computing Systems- ARCS 2016: Proceedings of the 29th International Conference on Architecture of Computing Systems. Hannig, F., Cardoso, J. M. P., Pionteck, T., Fey, D., Schröder-Preikschat, W. & Teich, J. (eds.). Cham: Springer International Publishing, p. 251-262 12 p. (Lecture Notes in Computer Science; vol. 9367).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. Boolean Logic Gate Exploration for Memristor Crossbar

    Xie, L., Du Nguyen, H. A., Taouil, M., Hamdioui, S. & Bertels, K., 2016, Proceedings - 11th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016. Danvers, MA: IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. Brownian Circuits: Designs

    Lee, J., Peper, F., Cotofana, S., Naruse, M., Ohtsu, M., Kawazoe, T., Takahashi, Y., Shimokawa, T., Kish, L. B. & Kubota, T., 2016, In : International Journal of Unconventional Computing. 12, 5-6, p. 341-362 22 p.

    Research output: Contribution to journalArticleScientificpeer-review

  11. CIM100x: Computation in-Memory Architecture Based on Resistive Devices

    Hamdioui, S., Taouil, M., Du Nguyen, H. A., Haron, A., Xie, L. & Bertels, K., 2016, Proceedings of CNNA 2016: 15th International Workshop on Cellular Nanoscale and their Applications. Berlin: VDE, p. 95-96 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation

    Zandrahimi, M., Al-Ars, Z., Debaud, P. & Castillejo, A., 2016, Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. Teich, J. (ed.). Piscataway, NJ: IEEE, p. 1018-1019 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  13. Comparative BTI Analysis for Various Sense Amplifier Designs

    Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Raghavan, P. & Catthoor, F., 2016, Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016. IEEE, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  14. Computational Challenges of Next Generation Sequencing Pipelines Using Heterogeneous Systems

    Houtgast, E., Sima, V., Bertels, K. & Al-Ars, Z., 2016, p. 1-4. 4 p.

    Research output: Contribution to conferenceAbstractScientific

  15. CryoCMOS Hardware Technology: A Classical Infrastructure for a Scalable Quantum Computer

    Homulle, H., Visser, S., Patra, B., Ferrari, G., Prati, E., García Almudever, C., Bertels, K., Sebastiano, F. & Charbon, E., 2016, 2016 Proceedings of the ACM International Conference on Computing Frontiers. New York, NY: Association for Computing Machinery (ACM), p. 282-287 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  16. Drift-free video coding for privacy protected video scrambling

    Choupani, R., Wong, S. & Tolun, M., 2016, 10th International Conference on Information, Communications and Signal Processing, ICICS 2015. Piscataway, NJ: IEEE, p. 1-5 5 p. 7459830

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  17. Editorial Note on Memristor Models, Circuits and Architectures

    Sirakoulis, G. C. & Hamdioui, S., 2016, In : International Journal of Unconventional Computing. 12, 4, p. 247-250 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  18. Error Correction Code protected Data Processing Units

    Cucu Laurenciu, N., Gupta, T., Savin, V. & Cotofana, S., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 37-42 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  19. Exploration of Alternative GPU Implementations of the Pair-HMMs Forward Algorithm

    Ren, S., Bertels, K. & Al-Ars, Z., 2016, Proceedings 3rd International Workshop on High Performance Computing on Bioinformatics. p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  20. Flexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing Units

    Nguyen-Ly, T. T., Gupta, T., Pezzin, M., Savin, V., Declercq, D. & Cotofana, S., 2016, Proceedings - 19th Euromicro Conference on Digital System Design (DSD 2016). Kitsos, P. (ed.). Piscataway: IEEE, p. 230-237 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  21. GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing

    Houtgast, E., Sima, V., Bertels, K. & Al-Ars, Z., 2016, Proceedings - 29th International Conference on Architecture of Computing Systems, ARCS 2016. Hannig, F., Cardoso, J. M. P., Pionteck, T., Fey, D., Schröder-Preikschat, W. & Teich, J. (eds.). Springer, p. 130-142 13 p. (Lecture Notes in Computer Science; vol. 9637).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  22. Instruction cache aging mitigation through Instruction Set Encoding

    Gebregiorgis, A., Oboril, F., Tahoori, M. B. & Hamdioui, S., 2016, Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016. Wright, P., Mukhopadhyay, S. & Cline, B. (eds.). Piscataway, NJ: IEEE, p. 325-330 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  23. Non-Volatile Look-up Table Based FPGA Implementations

    Xie, L., Du Nguyen, H. A., Taouil, M., Hamdioui, S., Bertels, K. & Alfailakawi, M., 2016, Proceedings : 11th IEEE International Design & Test Symposium. Tourki, R. (ed.). Piscataway, NJ, USA: IEEE, 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  24. Parallel Matrix Multiplication on Memristor-Based Computation-in-Memory Architecture

    Haron, A., Yu, J., Nane, R., Taouil, M., Hamdioui, S. & Bertels, K., 2016, 2016 International Conference on High Performance Computing & Simulation (HPCS): 14th Annual Meeting. Piscataway: IEEE, p. 759-766 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  25. Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms

    Houtgast, E., Sima, V., Marchiori, G., Bertels, K. & Al-Ars, Z., 2016, p. 1-1. 1 p.

    Research output: Contribution to conferenceAbstractScientific

  26. Power/Performance Trade-Offs in Real-Time SDRAM Command Scheduling

    Goossens, S., Chandrasekar, K., Akesson, B. & Goossens, K., 2016, In : IEEE Transactions on Computers. 65, 6, p. 1882-1895 14 p., 7169527.

    Research output: Contribution to journalArticleScientificpeer-review

  27. Quantification of Sense Amplifier Offset Voltage Degradation due to Zero-and Run-Time Variability

    Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Raghavan, P., Catthoor, F. & Dehaene, W., 2016, Proceedings - IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2016). Taskin, B. & Ghosal, P. (eds.). Los Alamitos, CA: IEEE, p. 725-730 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  28. RRAM Variability and its Mitigation Schemes

    Pouyan, P., Amat, E., Hamdioui, S. & Rubio, A., 2016, 26th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2016. Piscataway, NJ: IEEE, p. 141-146 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  29. Read Path Degradation Analysis in SRAM

    Agbo, I., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S., Catthoor, F. & Dehaene, W., 2016, Proceedings - 21st IEEE European Test Symposium, ETS 2016. Danvers, MA: IEEE, p. 1-2 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  30. Run-time Phase Prediction for a Reconfigurable VLIW Processor

    Guo, Q., Sartor, A., Brandon, A., Beck, A. C. S., Zhou, X. & Wong, S., 2016, Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. Teich, J. (ed.). Piscataway, NJ: IEEE, p. 1634-1639 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  31. Skeleton-based design and simulation flow for Computation-in-Memory architectures

    Yu, J., Nane, R., Haron, A., Hamdioui, S., Corporaal, H. & Bertels, K., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 165-170 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  32. Synthesizing HDL to Memristor Technology: A Generic Framework

    Du Nguyen, H. A., Xie, L., Taouil, M., Hamdioui, S. & Bertels, K., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 43-48 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  33. TFET NDR Skewed Inverter based Sensing Method

    Gupta, N., Makosiej, A., Vladimirescu, A., Amara, A., Cotofana, S. & Anghel, C., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 13-14 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  34. Testing open defects in memristor-based memories

    Hamdioui, S., Taouil, M. & Haron, NZB., 2016, In : IEEE Transactions on Computers. 64, 1, p. 247-259 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  35. The Fidelity Slider: A User-Defined Method to Trade off Accuracy for Performance in Canny Edge Detector

    Kritchallo, V., Vermij, E., Bertels, K. & Al-Ars, Z., 2016, 11th HiPEAC conference. p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

  36. Towards Robust Implementation of Memristor Crossbar Logic Circuits

    Xie, L., 2016, 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME). Piscataway., NJ: IEEE, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  37. Ultra-low leakage SRAM design with sub-32 nm tunnel FETs for low standby power applications

    Makosiej, A., Gupta, N., Vakul, N., Vladimirescu, A., Cotofana, S., Mahapatra, S., Amara, A. & Anghel, C., 2016, In : Micro and Nano Letters. 11, 12, p. 828-831 4 p.

    Research output: Contribution to journalArticleScientificpeer-review

  38. Using wavelet transform self-similarity for effective multiple description video coding

    Choupani, R., Wong, S. & Tolun, M., 2016, 10th International Conference on Information, Communications and Signal Processing, ICICS 2015. Piscataway, NJ: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  39. 2015
  40. An FPGA-based systolic array to accelerate the BWA-MEM genomic mapping algorithm

    Houtgast, E., Sima, VM., Bertels, K. & Al-Ars, Z., 28 Dec 2015, Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS XV. Soudris, D. & Carro, L. (eds.). Piscataway, NJ, USA: IEEE Society, p. 221-227 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  41. A sparse VLIW instruction encoding scheme compatible with generic binaries

    Brandon, A., Hoozemans, J., Van Straten, J., Lorenzon, A., Sartor, A., Schneider Beck, A. C. & Wong, S., 7 Dec 2015, 2015 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015. Institute of Electrical and Electronics Engineers Inc., 7393361

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  42. Multiple contexts in a multi-ported VLIW register file implementation

    Hoozemans, J., Johansen, J., Van Straten, J., Brandon, A. & Wong, S., 7 Dec 2015, 2015 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015. Institute of Electrical and Electronics Engineers Inc., 7393329

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  43. Memristor Based Computation-in-Memory Architecture for Data-Intensive Applications

    Hamdioui, S., Xie, L., Du Nguyen, H. A., Taouil, M., Bertels, K., Corporaal, H., Jiao, H., Catthoor, F., Wouters, D., Eike, L. & van Lunteren, J., Mar 2015, Proceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition. Nebel, W. (ed.). Piscataway, NJ: IEEE, p. 1718-1725 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  44. A DfT architecture and tool flow for 3-D SICs with test data compression, embedded cores, and multiple towers

    Papameletis, C., Keller, B., Chickermane, V., Hamdioui, S. & Marinissen, EJ., 2015, In : IEEE Design & Test. 32, 4, p. 40-48 9 p.

    Research output: Contribution to journalArticleProfessional

  45. A shared polyhedral cache for 3D wide-I/O multi-core computing platforms

    Lefter, M., Voicu, GR. & Cotofana, SD., 2015, Proceedings - 2015 IEEE International Symposium on Circuits and Systems. de Medeiras Silva, M. (ed.). Piscataway, NJ, USA: IEEE Society, p. 425-428 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  46. Accelerating complex brain-model simulations on GPU platforms

    Nguyen, HAD., Al-Ars, Z., Smaragdos, G. & Strydis, C., 2015, Proceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition. Nebel, W. (ed.). Piscataway, NJ, USA: IEEE Society, p. 974-979 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  47. Aging mitigation in memory arrays using self-controlled bit-flipping technique

    Gebregiorgis, A., Ebrahimi, M., Kiamehr, S., Oboril, F., Hamdioui, S. & Tahoori, MB., 2015, Proceedings - 20th Asia and South Pacific Design Automation Conference. Uchiyama, K. (ed.). Piscataway, NJ, USA: IEEE Society, p. 231-236 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  48. Analysis of RNAseq datasets from a comparative infectious disease zebrafish model using GeneTiles bioinformatics

    Veneman, WJ., de Sonneville, J., van der Kolk, KJ., Ordas, A., Al-Ars, Z., Meijer, AH. & Spaink, HP., 2015, In : Immunogenetics. 67, 3, p. 135-147 13 p.

    Research output: Contribution to journalArticleScientificpeer-review

  49. Asynchronous Charge Sharing Power Consistent Montgomery Multiplier

    Chen, J., Tisserand, A., Popovici, E. & Cotofana, SD., 2015, Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems. Jones, IW. & Sparso, J. (eds.). Piscataway: IEEE Society, p. 132-138 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  50. BTI analysis of SRAM write driver

    Agbo, IO., Taouil, M., Hamdioui, S., Weckx, P., Cosemans, S. & Catthoor, F., 2015, Proceedings of the 10th International Design and Test Symposium, IDT 2015. Kurdahi, F., Mir, S. & Yu, MO. (eds.). Piscataway: IEEE Society, p. 100-105 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  51. Beamforming in sparse, random, 3D array antennas with fluctuating element locations

    Bentum, M. J., Lager, I. E., Bosma, S., Bruinsma, W. P. & Hes, R., 2015, 2015 9th European Conference on Antennas and Propagation, EuCAP 2015. Piscataway, NJ: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  52. Calculation of worst-case execution time for multicore processors using deterministic execution

    Mushtaq, H., Al-Ars, Z. & Bertels, K., 2015, Proceedings of the 2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS. Reis, R. & Nunes de Lima, R. (eds.). Piscataway: IEEE Society, p. 33-39 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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