1. 2014
  2. Hacking and protecting IC hardware

    Hamdioui, S., di Natale, G., van Battum, G., Danger, J-L., Smailbegovic, F. & Tehranipoor, M., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Nebel, W. & Fettweis, G. (eds.). Leuven, Belgium: EDAA, p. 1-7 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. High-level power estimation and optimization of DRAMs

    Chandrasekar, K., 2014, 144 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  4. High-level synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain

    Nane, R., Sima, VM., Pham Quoc Cuong, P., Goncalves, F. & Bertels, K., 2014, Proceedings - 12th IEEE International Conference on Embedded and Ubiquitous Computing. Santambrogio, MD. (ed.). Los Alamitos, CA, USA: IEEE Computer Society, p. 138-145 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  5. Interconnect test for 3D stacked memory-on-logic

    Taouil, M., Masadeh, M., Hamdioui, S. & Marinissen, EJ., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Nebel, W. & Fettweis, G. (eds.). Leuven, Belgium: EDAA, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  6. Layout-based refined NPSF model for DRAM characterization and testing

    Sfikas, Y., Tsiatouhas, YE. & Hamdioui, S., 2014, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22, 6, p. 1446-1450 5 p.

    Research output: Contribution to journalArticleScientificpeer-review

  7. Line graph based fast rerouting and reconfiguration for handling transient and permanent node failures

    Joshi, PD. & Hamdioui, S., 2014, Proceedings - 2014 IEEE 15th International Conference on High Performance Switching and Routing. Trajkovic, L. & Jajszczyk, A. (eds.). Piscataway, NJ, USA: IEEE Society, p. 167-172 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  8. Linear compositional delay model for the timing analysis of sub-powered combinational circuits

    Chen, J., Spagnol, C., Grandhi, S., Popovici, E., Cotofana, SD. & Amaricai, A., 2014, Proceedings - 2014 IEEE Computer Society Annual Symposium on VLSI. Mohanty, SP., Ranganathan, N. & Bhanja, S. (eds.). Los Alamitos, CA, USA: IEEE Computer Society, p. 380-385 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. Link bandwidth aware backtracking based dynamic task mapping in NoC based MPSoCs

    Chen, C. & Cotofana, SD., 2014, Proceedings of the 2014 International Workshop on Network on Chip Architectures. Mehdipour, F. & Dimitrakopoulos et al, G. (eds.). New Tork, NY, USA: Association for Computing Machinery (ACM), p. 5-10 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. Memristor based memories: Technology, design and test

    Hamdioui, S., Aziza, H. & Sirakoulis, GC., 2014, Proceedings - 9th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era. Voyatzis, I. (ed.). Piscataway, NJ, USA: IEEE Society, p. 1-7 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. Multiple description coding for SNR scalable video transmission over unreliable networks

    Choupani, R., Wong, JSSM. & Tolun, MR., 2014, In : Multimedia Tools and Applications. 69, 3, p. 843-858 16 p.

    Research output: Contribution to journalArticleScientificpeer-review

  12. Process-variation-aware mapping of best-effort and real-time streaming applications to MPSoCs

    Mirzoyan, D., Akesson, B. & Goossens, KGW., 2014, In : ACM Transactions on Embedded Computing Systems. 13, 2s, p. 1-24 24 p.

    Research output: Contribution to journalArticleScientificpeer-review

  13. Quality versus cost analysis for 3D Stacked ICs

    Taouil, M., Hamdioui, S. & Marinissen, EJ., 2014, Proceedings - 32nd IEEE VLSI Test Symposium. Thibeault, C. (ed.). Los Alamitos, CA, USA: IEEE Computer Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  14. Reconfigurable high performance architectures: How much are they ready for safety-critical applications?

    Sabena, D., Sterpone, L., Schölzel, M., Koal, T., Vierhaus, HT., Wong, S., Glein, R., Rittner, F., Stender, C., Porrman, M. & Hagemeyer, J., 2014, Proceedings - 19th IEEE European Test Symposium. Hellebrand, S. (ed.). Piscataway, NJ, USA: IEEE Society, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  15. Region disjoint paths in a class of optimal line graph networks

    Joshi, PD., Sen, A., Hamdioui, S. & Bertels, K., 2014, Proceedings - 17th IEEE International Conference on Computational Science and Engineering (CSE 2014). El Baz, D., Liu, X., Hsu, CH., Kang, K. & Chen, W. (eds.). Los Alamitos, CA, USA: IEEE Computer Society, p. 1256-1260 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  16. Robust sub-powered asynchronous logic

    Chen, J., Tisserand, A., Popovici, E. & Cotofana, SD., 2014, Proceedings 2014 24th International Workshop on Power And Timing Modeling, Optimization and Simulation. Roca Androver, M., Becker, J. & Canals, V. (eds.). Piscataway, NJ, USA: IEEE Society, p. 1-7 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  17. Security methods in fault tolerant modified line graph based networks

    Joshi, PD. & Hamdioui, S., 2014, Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). Ottavi, M. & Hamdioui, S. (eds.). Piscataway, NJ, USA: IEEE Society, p. 57-62 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  18. Shortest path reduction in a class of uniform fault tolerant networks

    Joshi, PD. & Hamdioui, S., 2014, Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). Ottavi, M. & Hamdioui, S. (eds.). Piscataway, NJ, USA: IEEE Society, p. 234-239 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  19. Spatial multiple description coding for scalable video streams

    Choupani, R., Wong, S. & Tolun, M., 2014, In : International Journal of Digital Multimedia Broadcasting. 2014, Art. nr. 132621, p. 1-8 8 p.

    Research output: Contribution to journalArticleScientificpeer-review

  20. Testing PUF-based secure key storage circuits

    Cortez, AMMO., Roelofs, G., Hamdioui, S. & di Natale, G., 2014, Proceedings of the 2014 International Conference on Design, Automation & Test in Europe. Fettweis, G. & Nebel, W. (eds.). Leuven, Belgium: EDAA, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  21. Testing methods for PUF-based secure key storage circuits

    Cortez, AMMO., Roelofs, G., Hamdioui, S. & di Natale, G., 2014, In : Journal of Electronic Testing: theory and applications. 30, 5, p. 581-594 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  22. Towards an effective utilization of partially defected interconnections in 2D mesh NoCs

    Chen, C. & Cotofana, SD., 2014, Proceedings - 2014 IEEE Computer Society Annual Symposium on VLSI. Mohanty, SP., Ranganathan, N. & Bhanja, S. (eds.). Los Alamitos, CA, USA: IEEE Computer Society, p. 492-497 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  23. Towards energy effective LDPC decoding by exploiting channel noise variability

    Marconi, T., Spagnol, C., Popovici, E. & Cotofana, SD., 2014, Proceedings - 2014 22nd International Conference on Very Large Scale Integration. Garcia, L. (ed.). Piscataway, NJ, USA: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  24. Yield and cost analysis or 3D stacked ICs

    Taouil, M., 2014, 215 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  25. 2013
  26. 3D stacked wide-operand adders: A case study

    Voicu, GR., Lefter, M., Enachescu, M. & Cotofana, SD., 2013, Proceedings 2013 IEEE 24th International Conference on Application-specific Systems, Architectures and Processors. El-Ghawazi, T. & Smith et al, M. (eds.). Los Alamitos, CA, USA: IEEE Computer Society, p. 133-141 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  27. A 2×13-bit all-digital I/Q RF-DAC in 65-nm CMOS

    Alavi, SM., Voicu, GR., Staszewski, RB., de Vreede, LCN. & Long, JR., 2013, Digest of Papers - 2013 IEEE Radio Frequency Integrated Circuits Symposium. Hancock, TM. (ed.). Piscataway, NJ, USA: IEEE Society, p. 167-170 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  28. A direct measurement scheme of amalgamated aging effects with novel on-chip sensor

    Cucu Laurenciu, N. & Cotofana, SD., 2013, 21st IFIP/IEEE international conference on very large scale integration. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  29. A fully dynamic reconfigurable NoC-based MPSoC: the advantages of a multi-level reconfiguration

    Santos, PC., Nazar, GL., Anjam, F., Wong, JSSM., Matos, D. & Carro, L., 2013.

    Research output: Contribution to conferencePosterScientific

  30. A fully dynamic reconfigurable NoC-based MPSoC: the advantages of total reconfiguration

    Santos, PC., Nazar, GL., Anjam, F., Wong, JSSM., Matos, D. & Carro, L., 2013, 7th HiPEAC workshop on reconfigurable computing. s.n. (ed.). Berlin: Springer, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  31. A hardware/software platform for QoS bridging over multi-chip NoC-based systems

    Beyranvand Nejad, A., Molnos, AM., Escudero Martinez, M. & Goossens, KGW., 2013, In : Parallel Computing. 39, 9, p. 424-441 18 p.

    Research output: Contribution to journalArticleScientificpeer-review

  32. A low cost method to tolerate soft errors in the NoC router control plane

    Chen, C. & Cotofana, SD., 2013, 26th Annual IEEE International SoC Conference). s.n. (ed.). Piscataway: IEEE Society, p. 374-379 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  33. A method and system for power management

    Molnos, AM. & Goossens, KGW., 2013, Patent No. US 8569911 B2, Priority date 29 Oct 2013

    Research output: PatentOther research output

  34. A nonlinear degradation path dependent end-of-life estimation framework from noisy observations

    Cucu Laurenciu, N. & Cotofana, SD., 2013, In : Microelectronics Reliability. 53, 9-11, p. 1213-1217 5 p.

    Research output: Contribution to journalArticleScientificpeer-review

  35. A software-based technique enabling composable hierarchical preemptive scheduling for time-triggered applications

    Beyranvand Nejad, A., Molnos, AM. & Goossens, KGW., 2013, 19th IEEE International conference on embedded and real-time computing systems and applications. s.n. (ed.). Piscataway: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  36. A unified execution model for multiple computation models of streaming applications on a composable MPSoC

    Beyranvand Nejad, A., Molnos, AM. & Goossens, KGW., 2013, In : Journal of Systems Architecture. 59, 10, part C, p. 1032-1046 15 p.

    Research output: Contribution to journalArticleScientificpeer-review

  37. Adapting voltage ramp-up time for temperature noise reduction on memory-based PUFs

    Monteiro OliveiraCortez, AM., van der Leest, V., Maes, R., Schrijen, GJ. & Hamdioui, S., 2013, IEEE International symposium on hardware-oriented security and trust. s.n. (ed.). Piscataway: IEEE Society, p. 35-40 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  38. Addressing GPU on-chip shared memory bank conflicts using elastic pipeline

    Gou, C. & Gaydadjiev, GN., 2013, In : International Journal of Parallel Programming. 41, 3, p. 400-429 30 p.

    Research output: Contribution to journalArticleScientificpeer-review

  39. Aging assessment and reliability aware omputing platforms

    Wang, Y., 2013, 126 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  40. An efective routing algorithm to avoid unnecessary link abandon in 2D mesh NoCs

    Chen, C. & Cotofana, SD., 2013, 16th Euromicro Conference on Digital System Design. s.n. (ed.). Piscataway: IEEE Society, p. 311-318 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  41. An effective new CRT based reverse converter for a novel moduli set { 2^(2n+1)-1, 2^(2n+1), 2^(2n)-1 }

    Bankas, EK., Gbolagade, KA. & Cotofana, SD., 2013, Proceedings 2013 IEEE 24th International Conference on Application-specific Systems, Architectures and Processors. El-Ghawazi, T. & Smith et al, M. (eds.). Los Alamitos, CA , USA: IEEE Computer Society, p. 142-146 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  42. An energy effective SIMD accelerator for visual pattern matching

    Bira, C., Gugu, L., Hobincu, R., Codreanu, V., Petrica, L. & Cotofana, SD., 2013, 4th International symposium on highly efficient accelerators and reconfigurable technologies. s.n. (ed.). s.l.: Association for Computing Machinery (ACM), p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  43. Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers

    Papameletis, C., Keller, B., Chickermane, V., Marinissen, EJ. & Hamdioui, S., 2013, 18th IEEE European Test Symposium. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  44. Better than worst-case design for streaming applications under process variation

    Mirzoyan, D., 2013, Delft: D. Mirzoyan. 106 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  45. Bias temperature instability analysis in SRAM decoder

    Seyab, MSK., Hamdioui, S., Kukner, H., Raghavan, P. & Catthoor, F., 2013, Proceedings 18th IEEE European Test Symposium. Girard, P. & Peng, Z. (eds.). Los Alamitos, CA, USA: IEEE Society, p. 1-1 1 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  46. Bias temperature instability analysis, monitoring and mitigation for nano-scaled circuits

    Seyab, MSK., 2013, 133 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  47. Compiler-aided methodology for low overhead on-line testing

    Nazarian, G., Seepers, R. M., Strydis, C. & Gaydadjiev, GN., 2013, Proceedings - 2013 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. Silven, O. & Jeschke, H. (eds.). Piscataway, NJ, USA: IEEE Society, p. 219-226 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  48. Configurable fault-tolerance for a configurable VLIW processor

    Anjam, F. & Wong, JSSM., 2013, 9th International symposium on applied reconfigurable computing. Brisk, P., de Figueiredo Coutinho, JG. & Diniz, P. (eds.). Berlin: Springer, p. 1-12 12 p. (Lecture Notes in Computer Science; vol. 7806).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  49. Controlled degradation stochastic resonance in adaptive averaging cell based architectures

    Aymerich, N., Cotofana, SD. & Rubio, A., 2013, In : IEEE Transactions on Nanotechnology. 12, 6, p. 888-896 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  50. Controlling a complete hardware synthesis toolchain with LARA aspects

    Cardoso, JMP., Carvalho, T., Coutinho, JGF., Nobre, R., Nane, R., Diniz, P., Petrov, Z., Luk, W. & Bertels, KLM., 2013, In : Microprocessors and Microsystems. 37, 8, p. 1073-1089 17 p.

    Research output: Contribution to journalArticleScientificpeer-review

  51. Custom architecture for multicore audio Beamforming systems

    Theodoropoulos, D., Kuzmanov, GK. & Gaydadjiev, GN., 2013, In : ACM Transactions on Embedded Computing Systems. 13, 2, p. 1-26 26 p.

    Research output: Contribution to journalArticleScientificpeer-review

  52. Customizable register files for multidimensional SIMD architectures

    Ciobanu, CB., 2013, 135 p.

    Research output: ThesisDissertation (TU Delft)Scientific

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