Research output

  1. A Security Verification Template to Assess Cache Architecture Vulnerabilities

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  2. Towards Reliable and Secure Post-Quantum Co-Processors based on RISC-V

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

  3. Understanding MPSoCs: Exploiting memory microarchitectural vulnerabilities of high performance NoC-based MPSoCs

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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ID: 45551038