1. 2013
  2. A fully dynamic reconfigurable NoC-based MPSoC: the advantages of a multi-level reconfiguration

    Santos, PC., Nazar, GL., Anjam, F., Wong, JSSM., Matos, D. & Carro, L., 2013.

    Research output: Contribution to conferencePosterScientific

  3. A fully dynamic reconfigurable NoC-based MPSoC: the advantages of total reconfiguration

    Santos, PC., Nazar, GL., Anjam, F., Wong, JSSM., Matos, D. & Carro, L., 2013, 7th HiPEAC workshop on reconfigurable computing. s.n. (ed.). Berlin: Springer, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  4. Configurable fault-tolerance for a configurable VLIW processor

    Anjam, F. & Wong, JSSM., 2013, 9th International symposium on applied reconfigurable computing. Brisk, P., de Figueiredo Coutinho, JG. & Diniz, P. (eds.). Berlin: Springer, p. 1-12 12 p. (Lecture Notes in Computer Science; vol. 7806).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  5. Embedded reconfigurable computing: the ERA approach

    Keramidas, G., Wong, JSSM., Anjam, F., Brandon, AAC., Seedorf, RAE., Scordino, C., Carro, L. & Matos, D., 2013, 11th IEEE International conference on industrial informatics. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  6. Run-time adaptable VLIW processors -- resources, performance, power consumption, and reliability trade-offs

    Anjam, F., 2013, 144 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  7. 2012
  8. A run-time task migration scheme for an adjustable issue-slots multi-core processor

    Anjam, F., Kong, Q., Seedorf, RAE. & Wong, JSSM., 2012, 8th International symposium on applied reconfigurable computing. s.n. (ed.). s.l.: s.n., p. 1-12 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. Adapting communication for adaptable processors: a multi-axis reconfiguration approach

    Santos, PC., Nazar, GL., Anjam, F. & Wong, JSSM., 2012, International conference on ReConFigurable computing and FPGAs. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. Design of a pipelined and parameterized VLIW processor: r-VEX v.2.0

    Seedorf, RAE., Anjam, F., Brandon, AAC. & Wong, JSSM., 2012, 6th HiPEAC workshop on reconfigurable computing. s.n. (ed.). s.l.: s.n., p. 1-12 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. On the implementation of traps for a softcore VLIW processor

    Anjam, F., Kong, Q., Seedorf, RAE. & Wong, JSSM., 2012, 6th HiPEAC workshop on reconfigurable computing. s.n. (ed.). s.l.: s.n., p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. Simultaneous reconfiguration of issue-width and instruction cache for a VLIW processor

    Anjam, F., Carro, L., Wong, JSSM., Nazar, GL. & Rutzig, MB., 2012, International conference on embedded computer systems: architecture modeling and simulation. s.n. (ed.). New York: IEEE Society, p. 1-10 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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