1. 2018
  2. Low-Leakage 3D Stacked Hybrid NEMFET-CMOS Dual Port Memory

    Enachescu, M., Lefter, M., Voicu, G. & Cotofana, S., 2018, In : IEEE Transactions on Emerging Topics in Computing. 6, 2, p. 184-199 16 p.

    Research output: Contribution to journalArticleScientificpeer-review

  3. On Leveraging Vertical Proximity in 3D Memory Hierarchies

    Lefter, M., 2018, 147 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  4. 2017
  5. LDPC-Based Adaptive Multi-Error Correction for 3D Memories

    Lefter, M., Voicu, G., Marconi, T., Savin, V. & Cotofana, S., 2017, 2017 IEEE International Conference on Computer Design (ICCD). IEEE, Vol. Piscataway. p. 265-268 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  6. Low cost multi-error correction for 3D polyhedral memories

    Lefter, M., Marconi, T., Voicu, G. & Cotofana, S., 2017, 2017 IEEE/ACM International Symposium on Nanoscale Architectures. IEEE, p. 13-18 6 p. 8053722

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  7. 2015
  8. A shared polyhedral cache for 3D wide-I/O multi-core computing platforms

    Lefter, M., Voicu, GR. & Cotofana, SD., 2015, Proceedings - 2015 IEEE International Symposium on Circuits and Systems. de Medeiras Silva, M. (ed.). Piscataway, NJ, USA: IEEE Society, p. 425-428 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. 2014
  10. Energy effective 3D stacked hybrid NEMFET-CMOS caches

    Lefter, M., Enachescu, M., Voicu, GR. & Cotofana, SD., 2014, Proceedings of the 2014 IEEE/ACM International Symposium on Nanoscale Architectures. Klein, JO. & Moritz, CA. (eds.). Piscataway, NJ, USA: IEEE Society, p. 151-156 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. 2013
  12. 3D stacked wide-operand adders: A case study

    Voicu, GR., Lefter, M., Enachescu, M. & Cotofana, SD., 2013, Proceedings 2013 IEEE 24th International Conference on Application-specific Systems, Architectures and Processors. El-Ghawazi, T. & Smith et al, M. (eds.). Los Alamitos, CA, USA: IEEE Computer Society, p. 133-141 9 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  13. Is TSV-based 3D integration suitable for inter-die memory repair?

    Lefter, M., Voicu, GR., Taouil, M., Enachescu, M., Hamdioui, S. & Cotofana, SD., 2013, Design, automation & test in Europe conference & exhibition. s.n. (ed.). Piscataway: IEEE Society, p. 1-4 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  14. Ultra low power NEMFET based logic

    Enachescu, M., Lefter, M., Bazigos, A., Ionescu, A. & Cotofana, SD., 2013, IEEE International symposium on circuits and systems. Piscataway: IEEE Society, p. 566-569 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  15. 2012
  16. Exploring test opportunities for memory and interconnects in 3D ICs

    Taouil, M., Lefter, M. & Hamdioui, S., 2012, International design & test symposium. s.n. (ed.). s.l.: s.n., p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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