1. 2012
  2. A Markovian, variation-aware circuit-level aging model

    Cucu Laurenciu, N. & Cotofana, SD., 2012, International symposium on nanoscale architectures. s.n. (ed.). New York: IEEE Society, p. 1-7 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. Context aware slope based transistor-level aging model

    Cucu Laurenciu, N. & Cotofana, SD., 2012, In : Microelectronics Reliability. 52, 9-10, p. 1-6 6 p.

    Research output: Contribution to journalArticleScientificpeer-review

  4. 2013
  5. A direct measurement scheme of amalgamated aging effects with novel on-chip sensor

    Cucu Laurenciu, N. & Cotofana, SD., 2013, 21st IFIP/IEEE international conference on very large scale integration. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  6. A nonlinear degradation path dependent end-of-life estimation framework from noisy observations

    Cucu Laurenciu, N. & Cotofana, SD., 2013, In : Microelectronics Reliability. 53, 9-11, p. 1213-1217 5 p.

    Research output: Contribution to journalArticleScientificpeer-review

  7. 2014
  8. Critical transistors nexus based circuit-level aging assessment and prediction

    Cucu Laurenciu, N. & Cotofana, SD., 2014, In : Journal of Parallel and Distributed Computing. 74, 6, p. 2512-2520 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  9. 2015
  10. Low cost and energy, thermal noise driven, probability modulated random number generator

    Cucu Laurenciu, N. & Cotofana, SD., 2015, Proceedings - 2015 IEEE International Symposium on Circuits and Systems. de Medeiras Silva, M. (ed.). Piscataway, NJ, USA: IEEE Society, p. 2724-2727 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. 2016
  12. Error Correction Code protected Data Processing Units

    Cucu Laurenciu, N., Gupta, T., Savin, V. & Cotofana, S., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 37-42 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  13. 2017
  14. Fast and accurate workload-level neural network based IC energy consumption estimation

    Cucu Laurenciu, N. & Cotofana, S., 2017, SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. IEEE, p. 1-4 4 p. 7981598

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  15. Haar-based interconnect coding for energy effective medium/long range data transport

    Cucu Laurenciu, N. & Cotofana, S., 2017, Proceedings - 30th IEEE International System on Chip Conference, SOCC 2017. Alioto, M., Li, H., Becker, J., Schlichtmann, U. & Sridhar, R. (eds.). Piscataway, NJ: IEEE, p. 375-380 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  16. Reliability Aware Computing Platforms Design and Lifetime Management

    Cucu Laurenciu, N., 2017, 132 p.

    Research output: ThesisDissertation (TU Delft)Scientific

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