1. 2019
  2. Atomistic-level hysteresis-aware graphene structures electron transport model

    Wang, H., Cucu Laurenciu, N., Jiang, Y. & Cotofana, S. D., 2019, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., Vol. 2019-May. p. 1-5 5 p. 8702106

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. Graphene Nanoribbon Based Complementary Logic Gates and Circuits

    Jiang, Y., Cucu Laurenciu, N., Wang, H. & Cotofana, S. D., 2019, In : IEEE Transactions on Nanotechnology. 18, p. 287-298 12 p., 8666174.

    Research output: Contribution to journalArticleScientificpeer-review

  4. Non-Equilibrium Green Function-based Verilog-A Graphene Nanoribbon Model

    Jiang, Y., Laurenciu, N. C. & Cotofana, S. D., 2019, 2018 IEEE 18th International Conference on Nanotechnology (IEEE-NANO). Quinn, A., Li, G., Li, W. & Mathewson, A. (eds.). Piscataway, NJ, USA: IEEE, p. 1-4 4 p. 8626396

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  5. On Basic Boolean Function Graphene Nanoribbon Conductance Mapping

    Jiang, Y., Laurenciu, N. C. & Cotofana, S. D., 2019, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 66, 5, p. 1948-1959 12 p., 8574057.

    Research output: Contribution to journalArticleScientificpeer-review

  6. 2018
  7. Complementary arranged graphene nanoribbon-based boolean gates

    Jiang, Y., Laurenciu, N. C. & Cotofana, S., 17 Jul 2018, Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2018. Cotofana, S. & Sirakoulis, G. C. (eds.). New York, NY, USA: Association for Computing Machinery (ACM), p. 51-57 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  8. On Carving Basic Boolean Functions on Graphene Nanoribbons Conduction Maps

    Jiang, Y., Cucu Laurenciu, N. & Cotofana, S., 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS) : Proceedings. Piscataway, NY: IEEE, p. 1-5 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  9. On Effective Graphene Based Computing

    Laurenciu, N. C. & Cotofana, S. D., 2018, 2018 41st International Semiconductor Conference, CAS 2018 - Proceedings. Dinescu, M. A., Dobrescu, D., Muller, A., Cristea, D., Dragoman, M., Muller, R., Ciurea, M. L., Neculoiu, D. & Brezeanu, G. (eds.). Piscataway, NJ, USA: Institute of Electrical and Electronics Engineers Inc., Vol. 2018-October. p. 51-58 8 p. 8539757

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. 2017
  11. Fast and accurate workload-level neural network based IC energy consumption estimation

    Cucu Laurenciu, N. & Cotofana, S., 2017, SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. IEEE, p. 1-4 4 p. 7981598

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. Haar-based interconnect coding for energy effective medium/long range data transport

    Cucu Laurenciu, N. & Cotofana, S., 2017, Proceedings - 30th IEEE International System on Chip Conference, SOCC 2017. Alioto, M., Li, H., Becker, J., Schlichtmann, U. & Sridhar, R. (eds.). Piscataway, NJ: IEEE, p. 375-380 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  13. Reliability Aware Computing Platforms Design and Lifetime Management

    Cucu Laurenciu, N., 2017, 132 p.

    Research output: ThesisDissertation (TU Delft)Scientific

  14. 2016
  15. Error Correction Code protected Data Processing Units

    Cucu Laurenciu, N., Gupta, T., Savin, V. & Cotofana, S., 2016, 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). Zhao, W. & Moritz, C. A. (eds.). New York: Association for Computing Machinery (ACM), p. 37-42 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  16. 2015
  17. Low cost and energy, thermal noise driven, probability modulated random number generator

    Cucu Laurenciu, N. & Cotofana, SD., 2015, Proceedings - 2015 IEEE International Symposium on Circuits and Systems. de Medeiras Silva, M. (ed.). Piscataway, NJ, USA: IEEE Society, p. 2724-2727 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  18. 2014
  19. Critical transistors nexus based circuit-level aging assessment and prediction

    Cucu Laurenciu, N. & Cotofana, SD., 2014, In : Journal of Parallel and Distributed Computing. 74, 6, p. 2512-2520 9 p.

    Research output: Contribution to journalArticleScientificpeer-review

  20. 2013
  21. A direct measurement scheme of amalgamated aging effects with novel on-chip sensor

    Cucu Laurenciu, N. & Cotofana, SD., 2013, 21st IFIP/IEEE international conference on very large scale integration. s.n. (ed.). Piscataway: IEEE Society, p. 1-6 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  22. A nonlinear degradation path dependent end-of-life estimation framework from noisy observations

    Cucu Laurenciu, N. & Cotofana, SD., 2013, In : Microelectronics Reliability. 53, 9-11, p. 1213-1217 5 p.

    Research output: Contribution to journalArticleScientificpeer-review

  23. 2012
  24. A Markovian, variation-aware circuit-level aging model

    Cucu Laurenciu, N. & Cotofana, SD., 2012, International symposium on nanoscale architectures. s.n. (ed.). New York: IEEE Society, p. 1-7 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  25. Context aware slope based transistor-level aging model

    Cucu Laurenciu, N. & Cotofana, SD., 2012, In : Microelectronics Reliability. 52, 9-10, p. 1-6 6 p.

    Research output: Contribution to journalArticleScientificpeer-review

ID: 133579