Research output per year
Research output per year
Search results
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2023
A Digital PLL-Based Phase Modulator With Non-Uniform Clock Compensation and Non-linearity Predistortion
Gao, Z., Fritz, M., Spalink, G., Staszewski, R. B. & Babaie, M., 2023, In: IEEE Journal of Solid-State Circuits. 58, 9, p. 2526-2542 17 p.Research output: Contribution to journal › Article › Scientific › peer-review
Open AccessFile29 Downloads (Pure) -
A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit
Gao, Z., He, J., Fritz, M., Shen, Y., Zong, Z., Spalink, G., Alavi, M. S., Staszewski, R. B., Babaie, M. & More Authors, 2023, In: IEEE Journal of Solid-State Circuits. 58, 6, p. 1552-1571 20 p.Research output: Contribution to journal › Article › Scientific › peer-review
Open AccessFile1 Citation (Scopus)25 Downloads (Pure) -
Amplifier circuit and method of generating an amplified signal
Staszewski, R. B., Alavi, S. M., Babaie, M., Gao, Z. & He, J., 2023, IPC No. H03F, Priority date 12 Jan 2022, Priority No. WO 2023135036 A1Research output: Patent
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Circuit arrangement, time-mode arithmetic unit, all-digital phase-locked loop, and corresponding methods
Staszewski, R. B., Babaie, M., Alavi, S. M. & Gao, Z., 2023, IPC No. H03L, G04F, Priority No. WO 2023012341 A1Research output: Patent
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Digitally Intensive Frequency Synthesis and Modulation Exploiting a Time-mode Arithmetic Unit
Gao, Z., 2023, 179 p.Research output: Thesis › Dissertation (TU Delft)
4 Downloads (Pure) -
Pll circuit and method for generating a modulated carrier signal
Staszewski, R. B., Alavi, S. M., Babaie, M., Gao, Z. & He, J., 2023, IPC No. H03C, H03L, Priority date 1 Feb 2022, Priority No. WO 2023147962 A1Research output: Patent
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2022
A 2.6-to-4.1GHz Fractional-N Digital PLL Based on a Time-Mode Arithmetic Unit Achieving -249.4dB FoM and -59dBc Fractional Spurs
Gao, Z., He, J., Fritz, M., Gong, J., Shen, Y., Zong, Z., Chen, P., Staszewski, R. B., Alavi, M. S., Babaie, M. & More Authors, 2022, 2022 IEEE International Solid-State Circuits Conference, ISSCC 2022: Digest of technical papers. Fujino, L. C. (ed.). Danvers: IEEE, p. 380-382 3 p. 9731561. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 2022-February).Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review
Open AccessFile12 Citations (Scopus)25 Downloads (Pure) -
A DPLL-Based Phase Modulator Achieving -46dB EVM with A Fast Two-Step DCO Nonlinearity Calibration and Non-Uniform Clock Compensation
Gao, Z., Fritz, M., He, J., Spalink, G., Staszewski, R. B., Alavi, M. S. & Babaie, M., 2022, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers (IEEE), p. 14-15 2 p. (Digest of Technical Papers - Symposium on VLSI Technology; vol. 2022-June).Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review
Open AccessFile3 Citations (Scopus)15 Downloads (Pure) -
2019
28 GHz Quadrature Frequency Generation Exploiting Injection-Locked Harmonic Extractors for 5G Communications
Gao, Z., Hu, Y., Siriburanon, T. & Staszewski, R. B., 2019, 17th IEEE International New Circuits and Systems Conference, NEWCAS 2019. Institute of Electrical and Electronics Engineers (IEEE), 4 p. 8961293. (17th IEEE International New Circuits and Systems Conference, NEWCAS 2019).Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review
Open AccessFile1 Citation (Scopus)83 Downloads (Pure)