Abstract
We explore a methodology for patterned copper nanoparticle paste for 3D interconnect applications in wafer to wafer (W2W) bonding. A novel fine pitch thermal compression bonding process (sintering) with coated copper nanoparticle paste was developed. Most of the particle size is between 10-30 nm. Lithographically defined stencil printing using photoresist and lift-off was used to apply and pattern the paste. Variations in sintering process parameters, such as: pressure, geometry and ambient atmosphere, were studied. Compared to Sn-Ag-Cu (SAC) microsolder bumps, we achieved better interconnect resistivity after sintering at 260 °C for 10 min, in a 700 mBar hydrogen forming gas (H2/N2) environment. The electrical resistivity was 7.84 ± 1.45 μΩ·cm, which is about 4.6 times that of bulk copper. In addition, metallic nanoparticle interconnect porosity can influence the electrical properties of the interconnect. Consequently, we investigated the porosity effect on conductivity using finite element simulation. A linear relationship between the equivalent conductivity and particle overlapping ratio was found.
Original language | English |
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Title of host publication | Proceedings of the 17th International Conference on Electronic Packaging Technology (ICEPT) |
Editors | Keyun Bi, Sheng Liu, Shengjun Zhou |
Publisher | IEEE |
Pages | 1163-1167 |
ISBN (Print) | 978-1-5090-1396-8 |
DOIs | |
Publication status | Published - 2016 |
Event | 17th International Conference on Electronic Packaging Technology - Wuhan, China Duration: 16 Aug 2016 → 19 Aug 2016 Conference number: 17 |
Conference
Conference | 17th International Conference on Electronic Packaging Technology |
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Abbreviated title | ICEPT |
Country/Territory | China |
City | Wuhan |
Period | 16/08/16 → 19/08/16 |
Bibliographical note
Accepted Author ManuscriptKeywords
- Interconnect
- 3D packaging
- opper nanoparticle paste
- low-temperature sintering