This paper presents a class-AB driver for high-fidelity audio. It attains high-linearity at low-power by using an improved output stage biasing technique and a new frequency compensation scheme. Designed in standard 65nm CMOS, the driver delivers 5I.2mW peak power to 16Ω 0.33nF load, while consuming 0.97mW. It achieves -101.4dB THD+N over full audio band, the lowest ever reported linearity among sub-milliwatt CMOS class-AB drivers. Compared to prior works, it has >12dB better linearity and >7x higher unity-gain bandwidth, resulting in 2.5x improvement in linearity FOM (=Peak Load Power/ (Quiescent Power × THD+N[%])).

Original languageEnglish
Title of host publication2018 Symposium on VLSI Circuits Digest of Technical Papers
Place of PublicationPiscataway, NJ
PublisherIEEE
Pages235-236
Number of pages2
Volume2018-June
ISBN (Electronic)978-1-5386-4214-6
DOIs
Publication statusPublished - 2018
Event2018 Symposia on VLSI Technology and Circuits: 2018 VLSI Technology Symposium - 2018 VLSI Circuits - Hilton Hawaiian Village, Honolulu, United States
Duration: 18 Jun 201822 Jun 2018

Conference

Conference2018 Symposia on VLSI Technology and Circuits
CountryUnited States
CityHonolulu
Period18/06/1822/06/18

    Research areas

  • Linearity, Distortion, Damping, Topology, Bandwidth, Voltage measurement, Capacitors

ID: 47776551