Low-power, low phase noise (PN) cryogenic frequency generation is required for the control electronics of quantum computers. To avoid limiting the performance of quantum bits, the frequency noise of a PLL should be < 1.9 kHz rms [1]. However, it is challenging for RF oscillators, as the heart of frequency synthesizers to satisfy such a requirement at cryogenic temperatures (CT), since 1) white noise in nanoscale CMOS devices is limited by temperature-independent shot noise; 2) the transistor 1/f noise is much higher, resulting in the oscillator PN being dominated by the 30dB/dec region [1].

Original languageEnglish
Title of host publication2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
Place of PublicationPiscataway, NJ, USA
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages308-310
Volume2020-February
ISBN (Electronic)9781728132044
DOIs
Publication statusPublished - 2020
Event2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 - San Francisco, United States
Duration: 16 Feb 202020 Feb 2020

Conference

Conference2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
CountryUnited States
CitySan Francisco
Period16/02/2020/02/20

ID: 72800768