Abstract
This paper presents a dynamic zoom analog-to-digital converter for use in low-bandwidth (<1 kHz) instrumentation applications. It employs a high-speed asynchronous successive approximation register (SAR) ADC that dynamically updates the references of a fully differential Δ Σ ADC. Compared to previous zoom ADCs, faster reference updates relax the loop filter requirements, thus allowing the adoption of energy-efficient amplifiers. Fabricated in a 0.16-μm CMOS process, the prototype occupies 0.26 mm² and achieves 119.1-dB peak signal-to-noise ratio (SNR), 118.1-dB peak signal-to-noise-and-distortion-ratio (SNDR), and 120.3-dB dynamic range (DR) in a 1-kHz bandwidth while consuming 280 μW. This results in a Schreier figure of merit (FoM) of 185.8 dB.
Original language | English |
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Pages (from-to) | 1-11 |
Number of pages | 11 |
Journal | IEEE Journal of Solid-State Circuits |
DOIs | |
Publication status | Published - 2018 |
Bibliographical note
Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-careOtherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.
Keywords
- A/D conversion
- asynchronous successive approximation register analog-to-digital converter
- Bandwidth
- battery-powered applications
- Clocks
- delta-sigma ADC
- Distance measurement
- dynamic zoom ADC
- Energy resolution
- inverter-based operational transconductance amplifier (OTA)
- Linearity
- low-power circuits.
- Registers
- Signal resolution