Class-D amplifiers are often used in high-power audio applications due to their high power efficiency. They typically employ pulse-width modulation (PWM) at a fixed carrier frequency, which may cause electromagnetic interference (EMI). Setting this frequency fPWM) below the AM band (535 to 1605kHz) helps mitigate this, but its harmonics still contain substantial energy and must be filtered out by bulky LC filters with low cut-off frequencies (fc = 20 to 40 kHz), significantly increasing system cost and size. Stability considerations also constrain the amplifier's unity-gain frequency to be < mathrm{f} {mathrm{PWM}}/pi [1], compromising the audio-band loop gain required to suppress output-stage nonlinearity. Setting fPWM above the AM band helps increase fc and allows a higher loop gain [2]. However, this results in narrower pulses at higher power levels (higher modulation index), which cannot be faithfully produced by the output stage, thus exacerbating its non-linearity. Delta-sigma modulation (DeltaSigma M) has fixed pulse widths and does not suffer from these narrow-pulse artefacts. However, the out-of-band noise of 1bit modulators then requires larger LC filters. Moreover, high-order loop filters must be used to achieve sufficient SQNR, which then require additional techniques to maintain stability as the modulation range approaches 100% [3].

Original languageEnglish
Title of host publication2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
Number of pages3
ISBN (Electronic)978-1-7281-3205-1
ISBN (Print)978-1-7281-3206-8
Publication statusPublished - 2020
Event2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 - San Francisco, United States
Duration: 16 Feb 202020 Feb 2020


Conference2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
CountryUnited States
CitySan Francisco

ID: 72800413