A 211-1 pseudo-random binary sequence (PRBS) generator with trigger synchronization output (9.77-MHz rate) is implemented using synthetic transmission lines for the clock distribution. The full-rate data sequence is sourced from a 2:1 multiplex of dual shift register outputs synchronized to a half-rate clock. Quadrature half-rate clocks generated by a dual-mode (Dynastat) divide-by-2 are distributed via the synthetic lines to optimize power-speed tradeoffs in the design. The 790×620μm2 PRBS designed in 130-nm SiGe BiCMOS (200/280 GHz fT/fmax) consumes 250 mA at 2.5 V (i.e., 625 mW).

Original languageEnglish
Article number7410032
Pages (from-to)758-762
Number of pages5
JournalIEEE Transactions on Circuits and Systems Part 2: Express Briefs
Volume63
Issue number8
DOIs
Publication statusPublished - 1 Aug 2016

    Research areas

  • Dynastat frequency divider, pseudo-random binary sequence (PRBS) generator, SiGe heterojunction bipolar transistor (HBT), SiGe-BiCMOS technology, synthetic transmission line, trigger generator

ID: 7548233