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A Computation-In-Memory Accelerator Based on Resistive Devices. / Du Nguyen, Hoang Anh; Yu, Jintao; Abu Lebdeh, Muath; Taouil, Mottaqiallah; Hamdioui, Said.

Proceedings of the International Symposium on Memory Systems. New York : Association for Computing Machinery (ACM), 2019. p. 19-32 (ICPS: ACM International Conference Proceeding Series).

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

Harvard

Du Nguyen, HA, Yu, J, Abu Lebdeh, M, Taouil, M & Hamdioui, S 2019, A Computation-In-Memory Accelerator Based on Resistive Devices. in Proceedings of the International Symposium on Memory Systems. ICPS: ACM International Conference Proceeding Series, Association for Computing Machinery (ACM), New York, pp. 19-32, MEMSYS 2019, Wahington, United States, 30/09/19. https://doi.org/10.1145/3357526.3357554

APA

Du Nguyen, H. A., Yu, J., Abu Lebdeh, M., Taouil, M., & Hamdioui, S. (2019). A Computation-In-Memory Accelerator Based on Resistive Devices. In Proceedings of the International Symposium on Memory Systems (pp. 19-32). (ICPS: ACM International Conference Proceeding Series). Association for Computing Machinery (ACM). https://doi.org/10.1145/3357526.3357554

Vancouver

Du Nguyen HA, Yu J, Abu Lebdeh M, Taouil M, Hamdioui S. A Computation-In-Memory Accelerator Based on Resistive Devices. In Proceedings of the International Symposium on Memory Systems. New York: Association for Computing Machinery (ACM). 2019. p. 19-32. (ICPS: ACM International Conference Proceeding Series). https://doi.org/10.1145/3357526.3357554

Author

Du Nguyen, Hoang Anh ; Yu, Jintao ; Abu Lebdeh, Muath ; Taouil, Mottaqiallah ; Hamdioui, Said. / A Computation-In-Memory Accelerator Based on Resistive Devices. Proceedings of the International Symposium on Memory Systems. New York : Association for Computing Machinery (ACM), 2019. pp. 19-32 (ICPS: ACM International Conference Proceeding Series).

BibTeX

@inproceedings{4e9d59a6f9c94307a18cbdaf6a474400,
title = "A Computation-In-Memory Accelerator Based on Resistive Devices",
abstract = "Today's computing architectures suffer from the three well-known bottlenecks, which are the memory, the power and the instruction-level parallelism walls. Emerging non-volatile technologies, such as memristor, enable new resistive architectures that alleviate at least two of such bottlenecks, as they can process data within the memory with almost no leakage. In this paper, we propose a novel resistive computing architecture by extending a conventional architecture with a resistive based Computation-In-Memory accelerator (CIMX). We evaluate the delay, energy and area of the conventional and CIMX architecture using an analytical model and a simulation framework. The results (both based on the analytical model and simulation framework) show that the proposed architecture achieves at least one order of magnitude improvement in terms of performance, area, and energy efficiency for the considered benchmarks.",
keywords = "Computation-in-Memory, Accelerator, Resistive Computing, Memristor",
author = "{Du Nguyen}, {Hoang Anh} and Jintao Yu and {Abu Lebdeh}, Muath and Mottaqiallah Taouil and Said Hamdioui",
year = "2019",
doi = "10.1145/3357526.3357554",
language = "English",
isbn = "978-1-4503-7206-0",
series = "ICPS: ACM International Conference Proceeding Series",
publisher = "Association for Computing Machinery (ACM)",
pages = "19--32",
booktitle = "Proceedings of the International Symposium on Memory Systems",
address = "United States",
note = "MEMSYS 2019 : The International Symposium on Memory Systems ; Conference date: 30-09-2019 Through 03-10-2019",

}

RIS

TY - GEN

T1 - A Computation-In-Memory Accelerator Based on Resistive Devices

AU - Du Nguyen, Hoang Anh

AU - Yu, Jintao

AU - Abu Lebdeh, Muath

AU - Taouil, Mottaqiallah

AU - Hamdioui, Said

PY - 2019

Y1 - 2019

N2 - Today's computing architectures suffer from the three well-known bottlenecks, which are the memory, the power and the instruction-level parallelism walls. Emerging non-volatile technologies, such as memristor, enable new resistive architectures that alleviate at least two of such bottlenecks, as they can process data within the memory with almost no leakage. In this paper, we propose a novel resistive computing architecture by extending a conventional architecture with a resistive based Computation-In-Memory accelerator (CIMX). We evaluate the delay, energy and area of the conventional and CIMX architecture using an analytical model and a simulation framework. The results (both based on the analytical model and simulation framework) show that the proposed architecture achieves at least one order of magnitude improvement in terms of performance, area, and energy efficiency for the considered benchmarks.

AB - Today's computing architectures suffer from the three well-known bottlenecks, which are the memory, the power and the instruction-level parallelism walls. Emerging non-volatile technologies, such as memristor, enable new resistive architectures that alleviate at least two of such bottlenecks, as they can process data within the memory with almost no leakage. In this paper, we propose a novel resistive computing architecture by extending a conventional architecture with a resistive based Computation-In-Memory accelerator (CIMX). We evaluate the delay, energy and area of the conventional and CIMX architecture using an analytical model and a simulation framework. The results (both based on the analytical model and simulation framework) show that the proposed architecture achieves at least one order of magnitude improvement in terms of performance, area, and energy efficiency for the considered benchmarks.

KW - Computation-in-Memory

KW - Accelerator

KW - Resistive Computing

KW - Memristor

U2 - 10.1145/3357526.3357554

DO - 10.1145/3357526.3357554

M3 - Conference contribution

SN - 978-1-4503-7206-0

T3 - ICPS: ACM International Conference Proceeding Series

SP - 19

EP - 32

BT - Proceedings of the International Symposium on Memory Systems

PB - Association for Computing Machinery (ACM)

CY - New York

T2 - MEMSYS 2019

Y2 - 30 September 2019 through 3 October 2019

ER -

ID: 56027793