A fault primitive based analysis of linked faults in RAMs

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

6 Citations (Scopus)

Original language	Undefined/Unknown
Title of host publication	MTDT 2003; Records of the 2003 international workshop on memory technology, design and testing
Editors	s.n.
Place of Publication	Piscataway
Publisher	IEEE Society
Pages	33-39
Number of pages	7
ISBN (Print)	0-7695-2004-9
Publication status	Published - 2003
Event	2003 international workshop on memory technology, design and testing, San Jose, California - Piscataway Duration: 28 Jul 2003 → 29 Jul 2003

Name
Publisher	IEEE

Conference	2003 international workshop on memory technology, design and testing, San Jose, California
Period	28/07/03 → 29/07/03

Keywords

@inproceedings{0d81c06b85374e22aaf3afb5acef73b9,

title = "A fault primitive based analysis of linked faults in RAMs",

keywords = "Conf.proc. > 3 pag",

author = "Z Al-Ars and S Hamdioui and {van de Goor}, AJ",

year = "2003",

language = "Undefined/Unknown",

isbn = "0-7695-2004-9",

publisher = "IEEE Society",

pages = "33--39",

editor = "s.n.",

booktitle = "MTDT 2003; Records of the 2003 international workshop on memory technology, design and testing",

note = "2003 international workshop on memory technology, design and testing, San Jose, California ; Conference date: 28-07-2003 Through 29-07-2003",

}

A fault primitive based analysis of linked faults in RAMs. / Al-Ars, Z ; Hamdioui, S; van de Goor, AJ.
MTDT 2003; Records of the 2003 international workshop on memory technology, design and testing. ed. / s.n. Piscataway: IEEE Society, 2003. p. 33-39.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - A fault primitive based analysis of linked faults in RAMs

AU - Al-Ars, Z

AU - Hamdioui, S

AU - van de Goor, AJ

PY - 2003

Y1 - 2003

KW - Conf.proc. > 3 pag

M3 - Conference contribution

SN - 0-7695-2004-9

SP - 33

EP - 39

BT - MTDT 2003; Records of the 2003 international workshop on memory technology, design and testing

A2 - s.n., null

PB - IEEE Society

CY - Piscataway

T2 - 2003 international workshop on memory technology, design and testing, San Jose, California

Y2 - 28 July 2003 through 29 July 2003

ER -