A Fault-Tolerant Technique for Nanocomputers: NAND Multiplexing

Jie Han; PP Jonker

A Fault-Tolerant Technique for Nanocomputers: NAND Multiplexing

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific

Abstract

In order to make systems based on nanometerscale devices reliable, the design of faulttolerant architectures will be necessary. This paper presents a novel faulttolerant technique for future nanocomputers, NAND multiplexing. Initiated by von Neumann, the NAND multiplexing technique, based on a massive duplication of imperfect devices and randomized imperfect interconnect, had been studied with an extreme high degree of redundancy (A 4333). In this paper, the NAND multiplexing is extended to rather low degree of redundancy, leading it to a comprehensive faulttolerant theory. The stochastic Markov nature in the heart of the system is discovered, and the characteristics of such a Markov chain are exploited. This faulttolerant technique is potentially useful for future nanoelectronics. Keywords: Markov Process, Normal Distribution, Binomial Distribution

Original language	Undefined/Unknown
Title of host publication	Proceedings ASCI 2002
Editors	EF Deprettere, A Belloum, JWJ Heijnsdijk, F van der Stappen
Place of Publication	Delft
Publisher	ASCI
Pages	59-66
Number of pages	8
ISBN (Print)	90-803086-6-8
Publication status	Published - 2002
Event	8th Annual Conf. of the Advanced School for Computing and Imaging, Lochem - Delft Duration: 19 Jun 2002 → 21 Jun 2002

Publication series

Name
Publisher	ASCI

Conference

Conference	8th Annual Conf. of the Advanced School for Computing and Imaging, Lochem
Period	19/06/02 → 21/06/02

Bibliographical note

phpub 79

Keywords

conference contrib. non-refer.
Geen BTA classificatie

Cite this

@inproceedings{cedba44862474659bcc648244ee07763,

title = "A Fault-Tolerant Technique for Nanocomputers: NAND Multiplexing",

abstract = "In order to make systems based on nanometerscale devices reliable, the design of faulttolerant architectures will be necessary. This paper presents a novel faulttolerant technique for future nanocomputers, NAND multiplexing. Initiated by von Neumann, the NAND multiplexing technique, based on a massive duplication of imperfect devices and randomized imperfect interconnect, had been studied with an extreme high degree of redundancy (A 4333). In this paper, the NAND multiplexing is extended to rather low degree of redundancy, leading it to a comprehensive faulttolerant theory. The stochastic Markov nature in the heart of the system is discovered, and the characteristics of such a Markov chain are exploited. This faulttolerant technique is potentially useful for future nanoelectronics. Keywords: Markov Process, Normal Distribution, Binomial Distribution",

keywords = "conference contrib. non-refer., Geen BTA classificatie",

author = "Jie Han and PP Jonker",

note = "phpub 79; 8th Annual Conf. of the Advanced School for Computing and Imaging, Lochem ; Conference date: 19-06-2002 Through 21-06-2002",

year = "2002",

language = "Undefined/Unknown",

isbn = "90-803086-6-8",

publisher = "ASCI",

pages = "59--66",

editor = "EF Deprettere and A Belloum and JWJ Heijnsdijk and {van der Stappen}, F",

booktitle = "Proceedings ASCI 2002",

}

TY - GEN

T1 - A Fault-Tolerant Technique for Nanocomputers: NAND Multiplexing

AU - Han, Jie

AU - Jonker, PP

N1 - phpub 79

PY - 2002

Y1 - 2002

N2 - In order to make systems based on nanometerscale devices reliable, the design of faulttolerant architectures will be necessary. This paper presents a novel faulttolerant technique for future nanocomputers, NAND multiplexing. Initiated by von Neumann, the NAND multiplexing technique, based on a massive duplication of imperfect devices and randomized imperfect interconnect, had been studied with an extreme high degree of redundancy (A 4333). In this paper, the NAND multiplexing is extended to rather low degree of redundancy, leading it to a comprehensive faulttolerant theory. The stochastic Markov nature in the heart of the system is discovered, and the characteristics of such a Markov chain are exploited. This faulttolerant technique is potentially useful for future nanoelectronics. Keywords: Markov Process, Normal Distribution, Binomial Distribution

AB - In order to make systems based on nanometerscale devices reliable, the design of faulttolerant architectures will be necessary. This paper presents a novel faulttolerant technique for future nanocomputers, NAND multiplexing. Initiated by von Neumann, the NAND multiplexing technique, based on a massive duplication of imperfect devices and randomized imperfect interconnect, had been studied with an extreme high degree of redundancy (A 4333). In this paper, the NAND multiplexing is extended to rather low degree of redundancy, leading it to a comprehensive faulttolerant theory. The stochastic Markov nature in the heart of the system is discovered, and the characteristics of such a Markov chain are exploited. This faulttolerant technique is potentially useful for future nanoelectronics. Keywords: Markov Process, Normal Distribution, Binomial Distribution

KW - conference contrib. non-refer.

KW - Geen BTA classificatie

UR - http://www.ph.tn.tudelft.nl/People/jie/publications/asci2002_han.pdf

M3 - Conference contribution

SN - 90-803086-6-8

SP - 59

EP - 66

BT - Proceedings ASCI 2002

A2 - Deprettere, EF

A2 - Belloum, A

A2 - Heijnsdijk, JWJ

A2 - van der Stappen, F

PB - ASCI

CY - Delft

T2 - 8th Annual Conf. of the Advanced School for Computing and Imaging, Lochem

Y2 - 19 June 2002 through 21 June 2002

ER -

A Fault-Tolerant Technique for Nanocomputers: NAND Multiplexing

Abstract

Publication series

Conference

Bibliographical note

Keywords

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