Many modern FPGA-based soft-processor designs must include dedicated hardware modules to satisfy the requirements of a wide range of applications. Not seldom they all do not fit in the FPGA target, so their functionalities must be mapped into the much slower software domain. However, many complex soft-core processors usually underuse the available Block RAMs (BRAMs) when comparing to LUTs and registers. By taking advantage of this fact, we propose a generic low-cost BRAM-based function reuse mechanism (the BRAM-FR) that can be easily configured for precise or approximate modes to accelerate execution. The BRAM-FR was implemented in HDL and coupled to a configurable 4-issue VLIW processor. It was used to optimize different applications that use a soft-float library to emulate a Floating-Point Unit (FPU), and an image processing filter that tolerates a certain level of error. We show that our technique can accelerate the former by 1.23x and the latter by 1.52x, with a Reuse Table that fits in the BRAMs (that would otherwise be idle) of five tested FPGA targets with a marginal increase in the number of slice registers and LUTs.

Original languageEnglish
Title of host publicationApplied Reconfigurable Computing
Subtitle of host publicationArchitectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings
EditorsN. Voros, M. Huebner, G. Keramidas, D. Goehringer, C. Antonpoulos, P.C. Diniz
Place of PublicationCham
PublisherSpringer Verlag
Pages499-510
Number of pages12
ISBN (Electronic)978-3-319-7889-6
ISBN (Print)978-3-319-78889-0
DOIs
Publication statusPublished - 2018
EventARC 2018: 14th International Symposium on Applied Reconfigurable Computing - Santorini, Greece
Duration: 2 May 20184 May 2018

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
PublisherSpringer
Volume10824
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

ConferenceARC 2018
CountryGreece
CitySantorini
Period2/05/184/05/18

    Research areas

  • Approximate, FPGAs, Function reuse, Soft-core processors

ID: 45541415