A Uni¿ed Aging Model of NBTI and HCI Degradation towards Lifetime Reliability Management for Nanoscale MOSFET Circuits

Y Wang; SD Cotofana; Liang Fang

doi:10.1109/NANOARCH.2011.5941501

A Uni¿ed Aging Model of NBTI and HCI Degradation towards Lifetime Reliability Management for Nanoscale MOSFET Circuits

Y Wang, SD Cotofana, Liang Fang

Computer Engineering

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

55 Citations (Scopus)

Original language	English
Title of host publication	2011 IEEE/ACM International Symposium on Nanoscale Architectures
Editors	CA Moritz, I O'Connor
Place of Publication	Piscataway, NJ, USA
Publisher	IEEE Society
Pages	175-180
Number of pages	6
ISBN (Print)	978-1-4577-0995-1
DOIs	https://doi.org/10.1109/NANOARCH.2011.5941501
Publication status	Published - 2011
Event	NANOARCH 2011 - Piscataway, NJ, USA Duration: 8 Jun 2011 → 9 Jun 2011

Publication series

Name
Publisher	IEEE

Conference

Conference	NANOARCH 2011
Period	8/06/11 → 9/06/11

Keywords

Elektrotechniek
Techniek
Conf.proc. > 3 pag

Access to Document

10.1109/NANOARCH.2011.5941501

Cite this

@inproceedings{5dede29d967b40e9990ebc755614f37f,

title = "A Uni¿ed Aging Model of NBTI and HCI Degradation towards Lifetime Reliability Management for Nanoscale MOSFET Circuits",

keywords = "Elektrotechniek, Techniek, Conf.proc. > 3 pag",

author = "Y Wang and SD Cotofana and Liang Fang",

year = "2011",

doi = "10.1109/NANOARCH.2011.5941501",

language = "English",

isbn = "978-1-4577-0995-1",

publisher = "IEEE Society",

pages = "175--180",

editor = "CA Moritz and I O'Connor",

booktitle = "2011 IEEE/ACM International Symposium on Nanoscale Architectures",

note = "NANOARCH 2011 ; Conference date: 08-06-2011 Through 09-06-2011",

}

Wang, Y, Cotofana, SD & Fang, L 2011, A Uni¿ed Aging Model of NBTI and HCI Degradation towards Lifetime Reliability Management for Nanoscale MOSFET Circuits. in CA Moritz & I O'Connor (eds), 2011 IEEE/ACM International Symposium on Nanoscale Architectures. IEEE Society, Piscataway, NJ, USA, pp. 175-180, NANOARCH 2011, 8/06/11. https://doi.org/10.1109/NANOARCH.2011.5941501

A Uni¿ed Aging Model of NBTI and HCI Degradation towards Lifetime Reliability Management for Nanoscale MOSFET Circuits. / Wang, Y; Cotofana, SD; Fang, Liang.
2011 IEEE/ACM International Symposium on Nanoscale Architectures. ed. / CA Moritz; I O'Connor. Piscataway, NJ, USA: IEEE Society, 2011. p. 175-180.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

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AU - Wang, Y

AU - Cotofana, SD

AU - Fang, Liang

PY - 2011

Y1 - 2011

KW - Elektrotechniek

KW - Techniek

KW - Conf.proc. > 3 pag

U2 - 10.1109/NANOARCH.2011.5941501

DO - 10.1109/NANOARCH.2011.5941501

M3 - Conference contribution

SN - 978-1-4577-0995-1

SP - 175

EP - 180

BT - 2011 IEEE/ACM International Symposium on Nanoscale Architectures

A2 - Moritz, CA

A2 - O'Connor, I

PB - IEEE Society

CY - Piscataway, NJ, USA

T2 - NANOARCH 2011

Y2 - 8 June 2011 through 9 June 2011

ER -