A fully integrated RFDAC based phase modulator in 40nm bulk CMOS is presented. To boost in-band linearity and the frequency range of operation, a harmonic rejection RFDAC architecture that suppresses the 3rd and 5th harmonics is proposed. The achieved frequency agility of the phase modulator is verified over a 0.6-2.5GHz range yielding EVM of -34.5dB and -36dB for an 18Mb/s and 75Mb/s GMSK signals, respectively. The power consumption of the proposed phase modulator is 33 mW at 2.4GHz.

Original languageEnglish
Title of host publicationSIRF 2018 - 2018 IEEE 18th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
Place of PublicationPiscataway, NJ
PublisherIEEE
Pages8-11
Number of pages4
Volume2018-January
ISBN (Electronic)978-1-5386-1298-9
DOIs
Publication statusPublished - 2018
Event18th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SIRF 2018 - Anaheim, United States
Duration: 14 Jan 201817 Jan 2018

Conference

Conference18th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SIRF 2018
CountryUnited States
CityAnaheim
Period14/01/1817/01/18

    Research areas

  • frequency-agile, harmonic rejection, Phase modulator, RFDAC, wideband

ID: 46762285