TY - JOUR
T1 - An All-Digital PLL for Cellular Mobile Phones in 28-nm CMOS with -55 dBc Fractional and -91 dBc Reference Spurs
AU - Kuo, Feng-Wei
AU - Babaie, Masoud
AU - Chen, Huan-Neng (Ron)
AU - Cho, Lan-Chou
AU - Jou, Chewn-Pu
AU - Chen, Mark
AU - Staszewski, Bogdan
PY - 2018
Y1 - 2018
N2 - We propose a time-predictive architecture of an all-digital PLL (ADPLL) for cellular radios, which is optimized for advanced CMOS. It is based on a 1/8-length time-to-digital converter (TDC) of stabilized 7-ps resolution, as well as wide tuning range, and fine-resolution class-F digitally controlled oscillator (DCO) with only switchable metal capacitors. The 0.4-mW TDC clocked at 40 MHz maintains 7-ps resolution for <-107 dBc/Hz in-band phase noise while the 7.3-mW DCO emits -157 dBc/Hz at 20 MHz offset at 2 GHz. Reference spurs are <-91 dBc, while fractional spurs are <-55 dBc. The ADPLL supports a 2-point modulation and consumes 11.5-mW while occupying 0.22 mm$^2$.
AB - We propose a time-predictive architecture of an all-digital PLL (ADPLL) for cellular radios, which is optimized for advanced CMOS. It is based on a 1/8-length time-to-digital converter (TDC) of stabilized 7-ps resolution, as well as wide tuning range, and fine-resolution class-F digitally controlled oscillator (DCO) with only switchable metal capacitors. The 0.4-mW TDC clocked at 40 MHz maintains 7-ps resolution for <-107 dBc/Hz in-band phase noise while the 7.3-mW DCO emits -157 dBc/Hz at 20 MHz offset at 2 GHz. Reference spurs are <-91 dBc, while fractional spurs are <-55 dBc. The ADPLL supports a 2-point modulation and consumes 11.5-mW while occupying 0.22 mm$^2$.
KW - 4G cellular
KW - All-digital PLL (ADPLL)
KW - digitally controlled oscillator (DCO)
KW - long-term evolution (LTE)
KW - spurs
KW - time-to-digital converter (TDC)
UR - http://www.scopus.com/inward/record.url?scp=85051681864&partnerID=8YFLogxK
UR - http://resolver.tudelft.nl/uuid:bd6e56fd-2ea1-4a7f-8dbe-0154ce63742d
U2 - 10.1109/TCSI.2018.2855972
DO - 10.1109/TCSI.2018.2855972
M3 - Article
SN - 1549-8328
VL - 65
SP - 3756
EP - 3768
JO - IEEE Transactions on Circuits and Systems Part 1: Regular Papers
JF - IEEE Transactions on Circuits and Systems Part 1: Regular Papers
IS - 11
ER -