DOI

Numerous applications for mobile devices require 3D vision capabilities, which in turn require depth detection since this enables the evaluation of an object’s distance, position and shape. Despite the increasing popularity of depth
detection algorithms, available solutions need expensive hardware and/or additional ASICs, which are not suitable for low-cost commodity hardware devices. In this paper, we propose a low-cost and low-power embedded solution to provide high speed depth detection. We extend an existing off-the-shelf VLIW
image processor and perform algorithmic and architectural optimizations in order to achieve the requested real-time performance speed. Experimental results show that by adding different functional units and adjusting the algorithm to take full advantage of them, a 640x480 image pair with 64 disparities1 can be processed at 36.75 fps on a single processor instance, which
is an improvement of 23% compared to the best state-of-the-art image processor.
Original languageEnglish
Title of host publicationProceedings - 28th IEEE International Symposium on Computer Architecture and High Performance Computing
Subtitle of host publicationSBAC-PAD 2016
EditorsAlexandro Baldassin
Place of PublicationPiscataway
PublisherIEEE
Pages158-165
Number of pages8
ISBN (Print)978-1-5090-6108-2
DOIs
Publication statusPublished - 2016
Event28th International Symposium on Computer Architecture and High Performance (SBAC-PAD) - Marina del Rey Marriott, Los Angeles, United States
Duration: 26 Oct 201628 Oct 2016

Conference

Conference28th International Symposium on Computer Architecture and High Performance (SBAC-PAD)
Abbreviated titleSBAC-PAD 2016
CountryUnited States
CityLos Angeles
Period26/10/1628/10/16

    Research areas

  • stereo vision, VLIW

ID: 10299151