Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation

Mahroo Zandrahimi; Zaid Al-Ars; Philippe Debaud; Armand Castillejo

Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation

Mahroo Zandrahimi, Zaid Al-Ars, Philippe Debaud, Armand Castillejo

Computer Engineering

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

9 Citations (Scopus)

Abstract

Circuit monitoring techniques have been adopted widely to compensate for process, voltage, and temperature variations as well as power optimization of integrated circuits. For cost and complexity reasons, these techniques are usually implemented by means of performance monitors allowing fast performance evaluation during production. In this paper, we demonstrate the limitations of performance monitoring methodologies in terms of accuracy and effectiveness. Silicon measurements of a nanometric FD-SOI device show that the required design margin is above 10% of the clock cycle, which leads to unacceptable waste of
power.

Original language	English
Title of host publication	Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016
Editors	Jürgen Teich
Place of Publication	Piscataway, NJ
Publisher	IEEE
Pages	1018-1019
Number of pages	2
ISBN (Electronic)	978-3-9815370-7-9
ISBN (Print)	978-3-9815370-6-2
Publication status	Published - 2016
Event	2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 - Dresden, Germany Duration: 14 Mar 2016 → 18 Mar 2016

Conference

Conference	2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016
Abbreviated title	DATE 2016
Country/Territory	Germany
City	Dresden
Period	14/03/16 → 18/03/16

Keywords

Monitoring
Temperature measurement
Temperature sensors
Performance evaluation
Semiconductor device measurement
Frequency measurement
Timing

Cite this

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title = "Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation",

abstract = "Circuit monitoring techniques have been adopted widely to compensate for process, voltage, and temperature variations as well as power optimization of integrated circuits. For cost and complexity reasons, these techniques are usually implemented by means of performance monitors allowing fast performance evaluation during production. In this paper, we demonstrate the limitations of performance monitoring methodologies in terms of accuracy and effectiveness. Silicon measurements of a nanometric FD-SOI device show that the required design margin is above 10% of the clock cycle, which leads to unacceptable waste ofpower.",

keywords = "Monitoring, Temperature measurement, Temperature sensors, Performance evaluation, Semiconductor device measurement, Frequency measurement, Timing",

author = "Mahroo Zandrahimi and Zaid Al-Ars and Philippe Debaud and Armand Castillejo",

year = "2016",

language = "English",

isbn = "978-3-9815370-6-2",

pages = "1018--1019",

editor = "J{\"u}rgen Teich",

booktitle = "Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016",

publisher = "IEEE",

address = "United States",

note = "2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016, DATE 2016 ; Conference date: 14-03-2016 Through 18-03-2016",

}

Zandrahimi, M, Al-Ars, Z, Debaud, P & Castillejo, A 2016, Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation. in J Teich (ed.), Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. IEEE, Piscataway, NJ, pp. 1018-1019, 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016, Dresden, Germany, 14/03/16.

Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation. / Zandrahimi, Mahroo; Al-Ars, Zaid; Debaud, Philippe et al.
Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016. ed. / Jürgen Teich. Piscataway, NJ: IEEE, 2016. p. 1018-1019.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation

AU - Zandrahimi, Mahroo

AU - Al-Ars, Zaid

AU - Debaud, Philippe

AU - Castillejo, Armand

PY - 2016

Y1 - 2016

N2 - Circuit monitoring techniques have been adopted widely to compensate for process, voltage, and temperature variations as well as power optimization of integrated circuits. For cost and complexity reasons, these techniques are usually implemented by means of performance monitors allowing fast performance evaluation during production. In this paper, we demonstrate the limitations of performance monitoring methodologies in terms of accuracy and effectiveness. Silicon measurements of a nanometric FD-SOI device show that the required design margin is above 10% of the clock cycle, which leads to unacceptable waste ofpower.

AB - Circuit monitoring techniques have been adopted widely to compensate for process, voltage, and temperature variations as well as power optimization of integrated circuits. For cost and complexity reasons, these techniques are usually implemented by means of performance monitors allowing fast performance evaluation during production. In this paper, we demonstrate the limitations of performance monitoring methodologies in terms of accuracy and effectiveness. Silicon measurements of a nanometric FD-SOI device show that the required design margin is above 10% of the clock cycle, which leads to unacceptable waste ofpower.

KW - Monitoring

KW - Temperature measurement

KW - Temperature sensors

KW - Performance evaluation

KW - Semiconductor device measurement

KW - Frequency measurement

KW - Timing

M3 - Conference contribution

SN - 978-3-9815370-6-2

SP - 1018

EP - 1019

BT - Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016

A2 - Teich, Jürgen

PB - IEEE

CY - Piscataway, NJ

T2 - 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016

Y2 - 14 March 2016 through 18 March 2016

ER -

Challenges of Using On-Chip Performance Monitors for Process and Environmental Variation Compensation

Abstract

Conference

Keywords

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Cite this