@inproceedings{944e3a4cb4fa47d39dc4c58e53fc5cd9,
title = "Compact delay modeling of latch-based threshold logic gates",
keywords = "Elektrotechniek, Techniek, conference contrib. refereed, Conf.proc. > 3 pag",
author = "MD Padure and SD Cotofana and C Dan and S Vassiliadis and M Bodea",
year = "2002",
language = "Undefined/Unknown",
isbn = "0-7803-7440-1",
publisher = "IEEE Society",
pages = "317--320",
booktitle = "CAS 2002 Proceedings, Volume 2",
note = "2002 International semiconductor conference, 25th edition ; Conference date: 08-10-2002 Through 12-10-2002",
}