Comparative BTI Analysis for Various Sense Amplifier Designs

Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Praveen Raghavan; Francky Catthoor

doi:10.1109/DDECS.2016.7482438

Comparative BTI Analysis for Various Sense Amplifier Designs

Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Praveen Raghavan, Francky Catthoor

Computer Engineering

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

9 Citations (Scopus)

Abstract

With the continuous downscaling of CMOS technologies, ICs become more vulnerable to transistor aging mainly due to Bias Temperature Instability (BTI). This paper presents a comparative study of the BTI impact while considering varying supply voltages and temperatures for three memory sense amplifier (SA) designs: low power (LP), mid power/performance (MP), and high performance (HP). As an evaluation metric, the sensing delay (SD) of the three designs is analyzed for various workloads using 45nm technology. The results show that HP SA degrades faster than MP SA and LP SA irrespective of the workload, supply voltage, and temperature. At nominal supply voltage and temperature, HP degrades up to 1.62x faster than MP, and up to 1.94x faster than LP designs for the worst case workload. In addition, the results show that an increase of 10% in power supply has a marginal impact on the relative degradation. In contrast, the results show that a temperature increment significantly worsens the BTI impact. Finally, the results show that for 16nm technology, BTI impact becomes worse and even causes read failures. This clearly indicates that designing for reliability is not only strongly application dependent, but also technology node dependent. Hence, one has to carefully consider the targeted application, design, and technology node in order to provide appropriate solutions.

Original language	English
Title of host publication	Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016
Publisher	IEEE
Pages	1-6
Number of pages	6
ISBN (Electronic)	978-1-5090-2466-7
ISBN (Print)	978-1-5090-246-4
DOIs	https://doi.org/10.1109/DDECS.2016.7482438
Publication status	Published - 2016
Event	2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016 - Košice, Slovakia Duration: 20 Apr 2016 → 22 Apr 2016

Conference

Conference	2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016
Abbreviated title	DDECS 2016
Country/Territory	Slovakia
City	Košice
Period	20/04/16 → 22/04/16

Keywords

SRAM sense amplifier
BTI
NBTI
PBTI

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10.1109/DDECS.2016.7482438

Cite this

@inproceedings{b38a5d9f6aac4bb39ff9ca8da36203a5,

title = "Comparative BTI Analysis for Various Sense Amplifier Designs",

abstract = "With the continuous downscaling of CMOS technologies, ICs become more vulnerable to transistor aging mainly due to Bias Temperature Instability (BTI). This paper presents a comparative study of the BTI impact while considering varying supply voltages and temperatures for three memory sense amplifier (SA) designs: low power (LP), mid power/performance (MP), and high performance (HP). As an evaluation metric, the sensing delay (SD) of the three designs is analyzed for various workloads using 45nm technology. The results show that HP SA degrades faster than MP SA and LP SA irrespective of the workload, supply voltage, and temperature. At nominal supply voltage and temperature, HP degrades up to 1.62x faster than MP, and up to 1.94x faster than LP designs for the worst case workload. In addition, the results show that an increase of 10% in power supply has a marginal impact on the relative degradation. In contrast, the results show that a temperature increment significantly worsens the BTI impact. Finally, the results show that for 16nm technology, BTI impact becomes worse and even causes read failures. This clearly indicates that designing for reliability is not only strongly application dependent, but also technology node dependent. Hence, one has to carefully consider the targeted application, design, and technology node in order to provide appropriate solutions.",

keywords = "SRAM sense amplifier, BTI, NBTI, PBTI",

author = "Innocent Agbo and Mottaqiallah Taouil and Said Hamdioui and Pieter Weckx and Stefan Cosemans and Praveen Raghavan and Francky Catthoor",

year = "2016",

doi = "10.1109/DDECS.2016.7482438",

language = "English",

isbn = "978-1-5090-246-4",

pages = "1--6",

booktitle = "Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016",

publisher = "IEEE",

address = "United States",

note = "2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016, DDECS 2016 ; Conference date: 20-04-2016 Through 22-04-2016",

}

Agbo, I, Taouil, M , Hamdioui, S, Weckx, P, Cosemans, S, Raghavan, P & Catthoor, F 2016, Comparative BTI Analysis for Various Sense Amplifier Designs. in Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016. IEEE, pp. 1-6, 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016, Košice, Slovakia, 20/04/16. https://doi.org/10.1109/DDECS.2016.7482438

Comparative BTI Analysis for Various Sense Amplifier Designs. / Agbo, Innocent; Taouil, Mottaqiallah ; Hamdioui, Said et al.
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016. IEEE, 2016. p. 1-6.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - Comparative BTI Analysis for Various Sense Amplifier Designs

AU - Agbo, Innocent

AU - Taouil, Mottaqiallah

AU - Hamdioui, Said

AU - Weckx, Pieter

AU - Cosemans, Stefan

AU - Raghavan, Praveen

AU - Catthoor, Francky

PY - 2016

Y1 - 2016

N2 - With the continuous downscaling of CMOS technologies, ICs become more vulnerable to transistor aging mainly due to Bias Temperature Instability (BTI). This paper presents a comparative study of the BTI impact while considering varying supply voltages and temperatures for three memory sense amplifier (SA) designs: low power (LP), mid power/performance (MP), and high performance (HP). As an evaluation metric, the sensing delay (SD) of the three designs is analyzed for various workloads using 45nm technology. The results show that HP SA degrades faster than MP SA and LP SA irrespective of the workload, supply voltage, and temperature. At nominal supply voltage and temperature, HP degrades up to 1.62x faster than MP, and up to 1.94x faster than LP designs for the worst case workload. In addition, the results show that an increase of 10% in power supply has a marginal impact on the relative degradation. In contrast, the results show that a temperature increment significantly worsens the BTI impact. Finally, the results show that for 16nm technology, BTI impact becomes worse and even causes read failures. This clearly indicates that designing for reliability is not only strongly application dependent, but also technology node dependent. Hence, one has to carefully consider the targeted application, design, and technology node in order to provide appropriate solutions.

AB - With the continuous downscaling of CMOS technologies, ICs become more vulnerable to transistor aging mainly due to Bias Temperature Instability (BTI). This paper presents a comparative study of the BTI impact while considering varying supply voltages and temperatures for three memory sense amplifier (SA) designs: low power (LP), mid power/performance (MP), and high performance (HP). As an evaluation metric, the sensing delay (SD) of the three designs is analyzed for various workloads using 45nm technology. The results show that HP SA degrades faster than MP SA and LP SA irrespective of the workload, supply voltage, and temperature. At nominal supply voltage and temperature, HP degrades up to 1.62x faster than MP, and up to 1.94x faster than LP designs for the worst case workload. In addition, the results show that an increase of 10% in power supply has a marginal impact on the relative degradation. In contrast, the results show that a temperature increment significantly worsens the BTI impact. Finally, the results show that for 16nm technology, BTI impact becomes worse and even causes read failures. This clearly indicates that designing for reliability is not only strongly application dependent, but also technology node dependent. Hence, one has to carefully consider the targeted application, design, and technology node in order to provide appropriate solutions.

KW - SRAM sense amplifier

KW - BTI

KW - NBTI

KW - PBTI

U2 - 10.1109/DDECS.2016.7482438

DO - 10.1109/DDECS.2016.7482438

M3 - Conference contribution

SN - 978-1-5090-246-4

SP - 1

EP - 6

BT - Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016

PB - IEEE

T2 - 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016

Y2 - 20 April 2016 through 22 April 2016

ER -

Comparative BTI Analysis for Various Sense Amplifier Designs

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