Abstract
In-memory computing is a promising computing paradigm due to its capability to alleviate the memory bottleneck. It has even higher potential when implemented usingmemristive devices ormemristors with various beneficial characteristics such as nonvolatility, high scalability, near-zero standby power consumption, high density, and CMOS compatibility. Exploring in-memory computing architectures in the combination withmemristor technology is still in its infancy phase. Therefore, it faces challenges with respect to the development of the devices, circuits, architectures, compilers and applications.
This thesis focuses on exploring and developing in-memory computing in terms of architectures (including classification, limited schemes of instruction set,micro-architecture, communication and controller, as well as automation and simulator), and circuits (including logic synthesis flow and interconnect network schemes).
This thesis focuses on exploring and developing in-memory computing in terms of architectures (including classification, limited schemes of instruction set,micro-architecture, communication and controller, as well as automation and simulator), and circuits (including logic synthesis flow and interconnect network schemes).
Original language | English |
---|---|
Qualification | Doctor of Philosophy |
Awarding Institution |
|
Supervisors/Advisors |
|
Award date | 13 Sept 2019 |
Print ISBNs | 978-94-6384-060-6 |
DOIs | |
Publication status | Published - 2019 |
Keywords
- Computer architecture
- resistive computing
- Computation-in- Memory