Enhanced Bipolar Transistor Design for the Linearization of the Base-Collector Capacitance

J.M.M. van der Meulen; L.C.N. de Vreede

doi:10.1109/BCTM.2017.8112926

Enhanced Bipolar Transistor Design for the Linearization of the Base-Collector Capacitance

Electronics

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

Abstract

A frequency, bias and output power independent linearization technique for reducing the non-linear base-collector capacitance related distortion is proposed. Based on Volterra series analysis, the optimum base-collector capacitance for linear device operation is determined while respecting physical constrains. It is shown that by modifying the extrinsic base-collector region for an otherwise uncompromised device, the Cbc linearity compensation can be included within the transistor design itself. The practicality of this implementation is demonstrated by considering the doping profile accuracy requirements for achieving a significant OIP3 improvement of at least 5dB.

Original language	English
Title of host publication	Proceedings - 2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017
Place of Publication	Piscataway, NJ
Publisher	IEEE
Pages	126-129
Number of pages	4
ISBN (Electronic)	978-1-5090-6383-3
ISBN (Print)	978-1-5090-6382-6
DOIs	https://doi.org/10.1109/BCTM.2017.8112926
Publication status	Published - 2017
Event	2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017 - Miami, FL, United States Duration: 19 Oct 2017 → 21 Oct 2017

Conference

Conference	2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017
Country/Territory	United States
City	Miami, FL
Period	19/10/17 → 21/10/17

Keywords

linearity
Intermodulation distortion
bipolar transistor
semiconductor device
doping profile
amplifiers
base-collector capacitance

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10.1109/BCTM.2017.8112926

Cite this

@inproceedings{4cc5a4a9facc4d38b22d10a779365c23,

title = "Enhanced Bipolar Transistor Design for the Linearization of the Base-Collector Capacitance",

abstract = "A frequency, bias and output power independent linearization technique for reducing the non-linear base-collector capacitance related distortion is proposed. Based on Volterra series analysis, the optimum base-collector capacitance for linear device operation is determined while respecting physical constrains. It is shown that by modifying the extrinsic base-collector region for an otherwise uncompromised device, the Cbc linearity compensation can be included within the transistor design itself. The practicality of this implementation is demonstrated by considering the doping profile accuracy requirements for achieving a significant OIP3 improvement of at least 5dB.",

keywords = "linearity, Intermodulation distortion, bipolar transistor, semiconductor device, doping profile, amplifiers, base-collector capacitance",

author = "{van der Meulen}, J.M.M. and {de Vreede}, L.C.N.",

year = "2017",

doi = "10.1109/BCTM.2017.8112926",

language = "English",

isbn = "978-1-5090-6382-6",

pages = "126--129",

booktitle = "Proceedings - 2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017",

publisher = "IEEE",

address = "United States",

note = "2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017 ; Conference date: 19-10-2017 Through 21-10-2017",

}

van der Meulen, JMM & de Vreede, LCN 2017, Enhanced Bipolar Transistor Design for the Linearization of the Base-Collector Capacitance. in Proceedings - 2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017. IEEE, Piscataway, NJ, pp. 126-129, 2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017, Miami, FL, United States, 19/10/17. https://doi.org/10.1109/BCTM.2017.8112926

Enhanced Bipolar Transistor Design for the Linearization of the Base-Collector Capacitance. / van der Meulen, J.M.M.; de Vreede, L.C.N.
Proceedings - 2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017. Piscataway, NJ: IEEE, 2017. p. 126-129.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - Enhanced Bipolar Transistor Design for the Linearization of the Base-Collector Capacitance

AU - van der Meulen, J.M.M.

AU - de Vreede, L.C.N.

PY - 2017

Y1 - 2017

N2 - A frequency, bias and output power independent linearization technique for reducing the non-linear base-collector capacitance related distortion is proposed. Based on Volterra series analysis, the optimum base-collector capacitance for linear device operation is determined while respecting physical constrains. It is shown that by modifying the extrinsic base-collector region for an otherwise uncompromised device, the Cbc linearity compensation can be included within the transistor design itself. The practicality of this implementation is demonstrated by considering the doping profile accuracy requirements for achieving a significant OIP3 improvement of at least 5dB.

AB - A frequency, bias and output power independent linearization technique for reducing the non-linear base-collector capacitance related distortion is proposed. Based on Volterra series analysis, the optimum base-collector capacitance for linear device operation is determined while respecting physical constrains. It is shown that by modifying the extrinsic base-collector region for an otherwise uncompromised device, the Cbc linearity compensation can be included within the transistor design itself. The practicality of this implementation is demonstrated by considering the doping profile accuracy requirements for achieving a significant OIP3 improvement of at least 5dB.

KW - linearity

KW - Intermodulation distortion

KW - bipolar transistor

KW - semiconductor device

KW - doping profile

KW - amplifiers

KW - base-collector capacitance

U2 - 10.1109/BCTM.2017.8112926

DO - 10.1109/BCTM.2017.8112926

M3 - Conference contribution

SN - 978-1-5090-6382-6

SP - 126

EP - 129

BT - Proceedings - 2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017

PB - IEEE

CY - Piscataway, NJ

T2 - 2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2017

Y2 - 19 October 2017 through 21 October 2017

ER -

Enhanced Bipolar Transistor Design for the Linearization of the Base-Collector Capacitance

Abstract

Conference

Keywords

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