Abstract
In this article, a novel fan-out panel-level printed circuit board (PCB)-embedded package for phase-leg silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) power module is presented. Electro-thermo-mechanical co-design was conducted, and the maximum package parasitic inductance was found to be about 1.24 nH at 100 kHz. Compared with wire-bonded packages, the parasitic inductances of the PCB-embedded package decreased at least by 87.6%. Compared with blind via structure, the thermal resistance of the proposed blind block structure reduced at most by about 26%, and the stress of the SiC MOSFETs decreased by about 45.2%. Then, a novel PCB-embedded packaging process was developed, and three key packaging processes were analyzed. Furthermore, effect of PCB-embedded package on static characterization of SiC MOSFET was analyzed, and it was found that: 1) Output current of PCB-embedded package was decreased under a certain gate-source voltage compared to SiC die; 2) Miller capacitance of SiC MOSFET was increased thanks to parasitic capacitance induced by package; and 3) compared with SiC die, nonflat miller plateau of the PCB-embedded package extends, and as drain-source voltage increases, the nonflat miller plateau extends. Lastly, switching characteristics of the PCB-embedded package and TO-247 package were compared. The results show that the PCB-embedded package has smaller parasitic inductances.
Original language | English |
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Article number | 8894039 |
Pages (from-to) | 367-380 |
Number of pages | 14 |
Journal | IEEE Journal of Emerging and Selected Topics in Power Electronics |
Volume | 8 |
Issue number | 1 |
DOIs | |
Publication status | Published - 1 Mar 2020 |
Keywords
- Electro-thermo-mechanical codesign
- phase-leg silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) power module
- printed circuit board (PCB)-embedded package
- static characterization
- switching characterization